Chap.

10 Digital Integrated Circuits

Content
10-1 Introduction
10-2 Feature
10-3 Feature of BJT
10-4 RTL and DTL
10-5 TTL
10-6 ECL
10-7 MOS
10-8 CMOS
10-9 MOS transmission gate

10-1 Introduction Logic IC

ASIC:
ASIC:
Application
ApplicationSpecific
SpecificIntegrated
IntegratedCircuits
Circuits

10-1 Introduction
IC digital logic families

RTL Resistor-transistor logic

DTL Diode-transistor logic
TTL Transistor -transistor logic
ECL Emitter-coupled logic
MOS Metal-oxide semiconductor
CMOS Complementary Metal-oxide
semiconductor

Positve logic and Negative logic

Positive logic: H is set to be binary 1
Negative logic: L is set to be binary 1

10-2 Feature
The feature to be concerned of IC logic families:
fan-out
The no. of standard loads can be connected to the output of the gate
without degrading its normal operation
Sometimes the term loading is used

Power dissipation
The power needed by the gate
Expressed in mW

Propagation delay
The average transition-delay time for the signal to propagate from
input to output when the binary signal changes in value

Noise margin
The unwanted signals are referred to as noise
Noise margin is the maximum noise added to an input signal of a
digital circuit that does not cause an undesirable change in the
circuit output

Computing fan-out

I OH I OL
Fan out min(
,
)
I IH I IL

Computing fan-out ( High-level

output)

William Kleitz
Digital Electronics with VHDL, Quartus
II Version

Copyright 2006 by Pearson Education, Inc.

Upper Saddle River, New Jersey 07458
All rights reserved.

Computing fan-out ( Low-level output)

William Kleitz
Digital Electronics with VHDL, Quartus
II Version

Copyright 2006 by Pearson Education, Inc.

Upper Saddle River, New Jersey 07458
All rights reserved.

Power dissipation
I CCH I CCL
I CC (avg )
2
PD (avg ) I CC (avg ) VCC

For standard TTL

I CCH 1mA, I CCL 3mA
PD (avg ) ?
Total PD (avg ) in IC 7400 ?

Propagation delay
50% VH

50% VH

50% VH

For standard TTL t PHL 7 ns, t PLH 11ns

t P (avg ) ?

50% VH

Other delay times

Rise Time
from 10% up to 90% level

Fall Time
from 90% down to 10% level

Noise margin

Noise margin

High-state noise margin=0.4

Low-state noise margin=0.4

10-3 Feature of BJT

BJT
npn or pnp
Si or Ge
Si is used mainly
npn is most popular

Table 10-1
Typical npn Transistor Parameters
Region

VBE (V)

VCE (V)

Current
Relation

Cutoff

< 0.6

Open
circuit

IB=IC=0

Active

0.6-0.7

> 0.8

IC =hFEIB

Saturation

0.7-0.8

0.2

IB IC/hFE

Feature of npn-type BJT

RC 1k, VCC 5V
RB 22k, H 5V
hFE 50,

L 0.2V

Find Vo ?
for Vi L and Vi H

Diode symbol and characteristic

10-4 RTL and DTL circuits

RTL
Resistor TL
L: 0.2V, H: 1~3.6V

DTL
Diode TL
L: 0.2V, H: 4~5V

RTL--NOR

DTL--NAND

Modified DTL

10-5 Transistor-Transistor Logic (TTL)

The original basic TTL gate was a slight

improvement over the DTL gate.

There are several TTL subfamilies or series of the
TTL technology.
Eight TTL series appear in Table 10-2.
Has a number start with 74 and follows with a
suffix that identifies the series type, e.g 7404,
74S86, 74ALS161.
Three different types of output configurations:
1. open-collector output
2. Totem-pole output
3. Three-state (or tristate) output

Open-collector TTL Gate

Wired-AND of Two Open-Collector

Open-Collector Gates Forming a Common

Bus Line

In this case
Y=?

TTL Gate with Totem-Pole Output

Schottky TTL Gate

Three-state TTL Gate

10-6 Emitter-Coupled Logic (ECL)

Nonsaturated digital logic family
Propagation rate as low as 1-2ns
Used mostly in high speed circuits
Noise immunity and power dissipation is the worst of

all logic families.

High level -0.8V, Low level -1.8V
Including

Differential input amplifier

Internal temperature and voltage compensated bias network
Emitter-follower outputs

ECL Basic Gate

Graphic Symbols of ECL Gates