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Introduction to Microcontrollers
Prepared By,
ANILKUMAR PATIL M.Tech, (Ph.D).,
Asst Prof- E&TC
anilkumarpatil1988@gmail.com
Introduction
What is a Microcontroller?
A single chip computer or A CPU with all the peripherals like RAM,
ROM, I/O Ports, Timers , ADCs etc... on the same chip. For ex:
Motorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X etc
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Microprocessor:
A CPU built into a single VLSI chip is called a microprocessor. It is a general-purpose device
and additional external circuitry are added to make it a microcomputer. The microprocessor
contains arithmetic and logic unit (ALU), Instruction decoder and control unit, Instruction
register, Program counter (PC), clock circuit (internal or external), reset circuit (internal or
external) and registers. But the microprocessor has no on chip I/O Ports, Timers , Memory etc.
For example, Intel 8085 is an 8-bit microprocessor and Intel 8086/8088 a 16-bit microprocessor.
The block diagram of the Microprocessor is shown in Fig.1
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MICROCONTROLLER:
A microcontroller is a highly integrated single chip, which consists of on chip CPU (Central
Processing Unit), RAM (Random Access Memory), EPROM/PROM/ROM (Erasable
Programmable Read Only Memory), I/O (input/output) serial and parallel, timers, interrupt
controller.
For example, Intel 8051 is 8-bit microcontroller and Intel 8096 is 16-bit microcontroller. The
block diagram of Microcontroller is shown in Fig.2.
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Von Neumann Architecture: It has single memory storage to hold both program instructions
and data i.e. common program and data space. The CPU can either read an instruction or data
from the memory one at a time (or write data to memory) because instructions and data are
accessed using same bus system. The Von Neumann Architecture is named after the mathematician
and computer scientist John Von Neumann. The basic organization of memory in this architecture is
shown in figure 1.7.
The advantage of Von Neumann architecture is simple design of microcontroller chip because only
one memory is to be implemented which in turn reduces required hardware.
The disadvantage is slower execution of a program. It is also referred as Princeton architecture as
it was developed at Princeton University. Motorola 68HC11 microcontroller is based on
VonNeumann architecture.
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instructions and data i.e. separate program and data space. Since it has separate
buses to access program and data memory, it is possible to access program memory
and data memory simultaneously. The organization of memory and buses in this
architecture is shown in figure 1.8.
The advantage of a Harvard architecture microcontroller is that it is faster for a given
circuit complexity because it offers greater amount of parallelism. The disadvantage is
that it requires more hardware, because two sets of buses and memory blocks are
required. MCS 51 (8051 family) and PIC microcontrollers are based on Harvard
architecture
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CISC
RISC
Instruction Pipelining
execution speed
and
increased
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Disadvantages of microprocessor
The overall system cost is high
A large sized PCB is required for
assembling all the components
Overall product design requires more time
Physical size of the product is big
A discrete components are used, the
system is not reliable
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Advantages of Microcontroller
based System
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Applications of Microcontrollers
Biomedical instrumentations
ECG LCD Display cum recorder
Blood cell recorder cum Analyzer
Patient monitor system
Communication Systems
Numeric Pager
cellular phones
cable TV terminals
FAX
video games etc..
Peripheral controllers
keyboard controller
DRAM controller
printer controller
LASER controller
LAN controller etc..
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ROM type
8031
80xx
87xx
89xx
no ROM
mask ROM
EPROM
Flash EEPROM
89xx
8951
8952
8953
8955
898252
891051
892051
Example (AT89C51,AT89LV51)
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AT= ATMEL(Manufacture)
C = CMOS technology
LV= Low Power(3.0v)
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Motorolas 68HC11
It uses either UV erasable or
electronically erasable memory for
permanent storage
Upto 768 bytes of RAM
Upto 3 MHz clock frequency
27 milli amp of current drawn
It has 8 8-bit ADC for monitoring
analog signals in real time
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1. Manufacturing Cost
2. Performance
3. Size
4. Power
Real Time and Reactive : What is real time? A nice question to start with! A
definition can be given through an example here. Take an instance of travel in
BMW car. (Great feel it would be). (The braking system is an embedded system).
And unfortunately a lorry is coming opposite to the car... The driver is applying
brake there!. What would be the action required? It should immediately stop the
car right. This is a real time and reactive behavior. The brake may be applied at
any point in time. And the vehicle should be stopped immediately at the instance
of applying brake. It is never known when brake has to be applied, so the system
should be ready to accept the input at any time and should be ready to process it.
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User Interface : Here too with an example the concept can be explained.
NOKIA mobile phones are very big hit in market right, Why? What is the
reason? Is that because other mobile did not perform well? No, is the answer.
Nokia had excellent and simple user interface. Calls can be made and received
very easily. Typing SMS is also easier So it has been read by the people very
well.
So designing system with easier and comfortable interface is most important.
Also it should have options required for the operation of the device. Example is
ATM machine; it has got comfortable interfaces and options. Keep it in mind
and design the system.
Multi Rate: Embedded Systems need to control and drive certain operations at
one rate and certain other operations at different rate. Example can be Digital
Camera. It is used to take pictures which are still. Also it is capable of shooting
video. So it has to be capable of driving the first operation from a speed different
than the second one.
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Roll Of Microcontroller In
Embedded System
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Growth Rate
Automotive (36%),
Industrial Automation (22%),
Telecommunications (37%),
Consumer Electronics (41%) And
Health/Medical Equipment (33%).
Similarly, A Modern Cellular Phone Has
More Features Than Those Of a Laptop
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A Hierarchy of Languages
Editor
Assembler
Linker
Loader
Debugger
Emulator
Editor
It helps the user to create a file that
contains assembly language statements
The editor stores the ASCII codes for the
letters and numbers in the successive RAM
locations
The file is called as the source file and an
ASM extension is given to it
Example of editor wordpad,
notepad,wordstar etc
Assembler
Assembler is a program which translates the
mnemonics into corresponding binary codes.
Operation of Assembler
1) It reads the source file of program
2) It determines the displacement of data items, offset
of label etc and put them into a symbol table
3) It produces the binary codes for each instruction
and inserts the offset etc..
4) It generates the object file with extension o
5) The assembler indicates any syntax error, this error
should be edited using the editor
Linkers
Linker is a program which is used for joining
many object files into one large object file
Searches program libraries to find library
routines used by the program
Library: collection of pre-written functions and
subroutines made available to perform commonly
required activities
17-43
Linking
Object file
Object
file or object
module
Linker
Executable
file
C library
Chapter 17 Programming Tools
17-44
Locator
The locator is a program which is used
for assigning the specific address of the
locations where the segments of the
object code are to be loaded into the
memory
Debugger
A software tool that is used to detect the
source of program by performing stepby-step execution of application code
and viewing the content of code
variables.
It is a program which permits the user to
load object code into system memory,
execute the program and debug it.
Emulator
Emulator is used to test and debug the
hardware and software of an external
system.
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Logic Analyzer
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A logic analyzer is an electronic instrument that captures and displays multiple signals from a
digital system or digital circuit. A logic analyzer may convert the captured data into timing
diagrams, protocol decodes, state machine traces, assembly language, or may correlate assembly
with source-level software. Logic Analyzers have advanced triggering capabilities, and are
useful when a user needs to see the timing relationships between many signals in a digital
system.
Logic analyzers can uncover hardware defects that are not found in simulation. These problems
are typically too difficult to model in simulation, or too time consuming to simulate and often
cross multiple clock domains
Logic analyser types
Modular logic analyzers : This type of logic analyser is probably what may be thought of as
the most typical form of test instrument, although it is the highest cost option providing the
highest level of functionality. It comprises a chassis and the various modules - including channel
modules. The number of modules being larger for the higher channel counts.
Portable logic analyzers : In a number of instances there may be a need for a smaller analyser,
possibly for restricted budgets or for field service. These test instruments incorporate all
elements of the analyser into a single box for ease of transportation.
PC based logic analyzers: There is a growing number of PC based logic analysers. These
consist of an analyser unit that is connected to a PC. USB is an obvious option for this, but
Ethernet is also widely used because of its high speed. This form of PC based instrument uses
the processing power of the PC combined with its display to reduce the cost of the overall
system.
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There are several key characteristics of a logic analyser that separate it from multichannel oscilloscopes and other test instruments:
Provide a time display of logic states: Logic analysers possess a horizontal time axis
and a vertical axis to indicate a logic high or low states. In this way a picture of the
digital lines can be easily displayed.
Multiple channels: Logic analyzers are designed to monitor a large number of digital
lines. As logic analyzers are optimized for monitoring a large number of digital circuits,
typically they may have anywhere between about 32 and 200+ channels they can
monitor, each channel monitoring one digital line. However some specialized logic
analyzers are suitably scaled to be able to handle many more lines, and in this way
enable tracking and fault finding on much more complex systems.
Displays logic states: The vertical display on the analyser displays the logic state as a
high of low state. The signals enter the various channels and are converted into a high
or low state for further processing within the analyser. It provides a logic timing
diagram of the various lines being monitored.
Does NOT display analogue information : These test instruments do not present any
analogue information, and in this way they differ from an oscilloscope. They are purely
aimed at monitoring the logic operation of the system. If any analogue information is
required, then an oscilloscope must be used in addition.
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UNIT 2
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ROM type
8031
80xx
87xx
89xx
no ROM
mask ROM
EPROM
Flash EEPROM
89xx
8951
8952
8953
8955
898252
891051
892051
Example (AT89C51,AT89LV51)
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AT= ATMEL(Manufacture)
C = CMOS technology
LV= Low Power(3.0v)
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ROM
RAM
Timer
8051
4k
128
8031
128
8751
4k eprom
128
8052
8krom
256
8032
256
8752
8k eprom
256
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Block Diagram
External interrupts
Interrupt
Control
On-chip
ROM for
program
code
Timer/Counter
On-chip
RAM
Timer 1
Timer 0
CPU
OSC
Bus
Control
4 I/O Ports
P0 P1 P2 P3
Address/Data
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Serial
Port
TxD RxD
Counter
Inputs
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8051
Schematic
Pin out
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8051
Foot Print
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
8051
(8031)
(8751)
(8951)
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40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
Vcc
P0.0(AD0
)P0.1(AD1)
P0.2(AD2
) 0.3(AD3)
P
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA/VPP
ALE/PROG
PSEN
P2.7(A15)
P2.6(A14
)P2.5(A13
)P2.4(A12
)P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
+
10 uF
31
30 pF
8.2 K
11.0592 MHz
19
18
30 pF
EA/VPP
X1
X2
9 RST
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10 K
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Port 0
P0.0
DS5000 P0.1
P0.2
8751
P0.3
P0.4
8951
P0.5
P0.6
P0.7
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Port 0
pins 32-39 P0.0 P0.7
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Port 1
pins 1-8 P1.0
P1.7
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Port 2
pins 21-28 P2.0
P2.7
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ALE
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Registers
A
B
R0
DPTR
DPH
DPL
R1
R2
PC
PC
R3
R4
R5
R6
R7
Some 8-bitt Registers of
the 8051
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Port0
latch
Port1
latch
Port2
latch
Port3
latch
Port0
Port1
Port2
Port3
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DPTR
The data pointer consists of a high
byte(DPH) and a low byte (DPL). Its
function is to hold a 16 bit address. It
may be manipulated as a 16 bit data
register or two independent 8 bit
register. It serves as a base register in
indirect jumps, lookup table instructions
and external data transfer.
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AC
F0
RS1
RS0
OV
RS0
RS1
BANK SELECTION
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Bit-Addressable RAM
20H
1FH
18H
17H
10H
0FH
08H
07H
00H
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Register Bank 3
Register Bank 2
Register Bank 1( Stack)
Register Bank 0
Memory Organization
The 8051 memory organization is rather complex.
The 8051 has separate address spaces for Program Memory, Data Memory, and
external RAM.
This is refereed to as a Harvard architecture.
The early Mark I (1944) computer developed at Harvard was of this type of
architecture.
Von Neumann at Princeton pointed out that it was not necessary to put
instructions and data in separate memories.
Most machines have been Princeton architecture.
Recently Harvard architecture has been employed to help alleviate the
memory bottleneck.
Both program memory and external data memory are 8 bits wide and use 16 bits
of address. The internal data memory is accessed using an 8-bit address.
Since the same address can refer to different locations the specific location is
determined by the type of instruction.
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CM
PC = PC(15..0)
DPTR = DPTR(15..0)
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External Memory
Supports up to 64K bytes external memory.
XM(0000,,FFFF)
= XM(0000,,FFFF; 7,,0)
Accessed by using the MOVX instruction.
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MOVX A,@DPTR
;A XM(DPTR)
MOVX A,@Rn
;A XM(P2|Rn)
MOVX @DPTR,A
;XM(DPTR) A
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;XM(P2|Rn) A
Data Memory
The original 8051 had 128 bytes of on-chip data RAM.
This memory includes 4 banks of general purpose registers at
DM(00..1F)
Only one bank can be active at a time.
If all four banks are used, DM(20..7F) is available for program data.
DM(20..2F) is bit addressable as BADM(00..7F).
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MOV A,0A2H
XM
MOV R1,#0A2H
MOV A@R1
MOV A,62H
DM
MOV R1,#62H
MOV A@R1
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Data
memory
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Data Memory
(DM)
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Timer
2 16-bit timer
1 16-bit timer with
extra-functionality
(introduced with the
8052)
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TMOD Register:
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high.
TCON Register:
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Internal clock
To Counter/Timer
Falling edge-trigger
External clock
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Timer Modes
- 0: 13 bit timer
- 1: 16-bit timer
- 2: 8-Bit auto reload
-3: Split timer mode
Mode 0: 13-Bit Timer
- Lower byte (TL0/TL1) + 5 bits of upper bytes (TH0/TH1).
- Backward compatible to the 8048
- Not generally used
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Mode 1: 16-bit
- All 16 bits of the timer (TH0/TL0, TH1,TL1) are used.
- Maximum count is 65,536
-At 12Mhz, maximum interval is 65536 microseconds
or 65.536 milliseconds
- TF0 must be reset after each overflow
- THx / TLx must be manually reloaded after each overflow.
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http://www.slideshare.net/ajooani/introd
uction-to-microcontrollers-29681308
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