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8051 consists of
Program memory:
Data Memory :
Next memory block ( in the range of 20h to 2Fh) is bitaddressable, which means that each bit being there has its own
address from 0 to 7Fh.
There are 16 such registers, this block contains in total of 128
bits with separate addresses (The 0th bit of the 20h byte has the
bit address 0 and the 7th bit of th 2Fh byte has the bit address
7Fh).
Not all of the addresses from 80h to FFh are used for
SFRs, and attempting to address that is not defined or
empty.
A Register (Accumulator)
B register
R Registers (R0-R7)
The
RS0,
RS2
0
1
0
1
Space in RAM
Bank0 00h-07h
Bank1 08h-0Fh
Bank2 10h-17h
Bank3 18h-1Fh
T1M1
0
0
1
1
T1M0
0
1
0
1
Mode
0
1
2
3
Description
13-bit timer
16-bit time
8-bit auto-reload
Split mode
When using this mode, the higher byte TH0 and only the
first 5 bits of the lower byte TL0 are in use.
Timer 0 in mode 1 (16-bit timer)
All bits from the registers TH0 and TL0 are used in this
mode. That is why for this mode is being more commonly
used
Only 4 of all 8 bits this register has are used for timer
control, while others are used for interrupt control
SM0 SM1
0
0
0
1
1
0
Mode
0
1
2
Description
8-bit Shift
register
Baud Rate
1/12 the
quartz frequency
8-bit UART
9-bit UART
9-bit UART
RB8 - bit has the same purpose as the bit TB8 but this
time on the receiver side. This means that on receiving
data in 9-bit format , the value of the last ( ninth) appears
on its location.
TI - bit is automatically set at the moment the last bit of
one byte is sent when the USART operates as a
transmitter.
RI - bit is automatically set once one byte has been
received.
Mode0: In this mode , the data are transferred through
the RXD pin, while clock pulses appear on the TXD pin.
The bout rate is fixed at 1/12 the quartz oscillator
frequency.
Interrupt Priorities