System on Chip

S Soju Krishna

Seminar on System on Chip

 OUTLINE

 Introduction
 What is SoC ?
 Components of SoC
 SoC Architecture
 SoC Cores and Interconnection
 Design Flow
 Characteristics
 Advantages and Disadvantages
 Applications
 Conclusion

Seminar on System on Chip

 Introduction
TechnologicalAdvances
Technological Advances TheConsequences
The Consequences
 Today’s
 Today’s chip
chip can
can contains
contains  Components
Componentsconnected
connectedon on

100Mtransistors
transistors..
100M aa Printed
Printed Circuit
Circuit Board
Board can
can
now be
now be integrated
integrated onto
onto
 Transistor
 Transistor gate
gate lengths
lengths are
are singlechip
chip..
single
nowin
now interm
termof
ofnanometers
nanometers..
 Hence
 Hence the
the development
development of of
 Approximately
 Approximately every every 18 18 System-On-Chipdesign
design..
System-On-Chip
months the
months the number
number of of
transistors on
transistors on aa chip
chip doubles
doubles
––Moore’s
Moore’slaw
law..

Seminar on System on Chip

 What is SoC ?
The VLSI manufacturing technology SoC is a high performance
advances has made possible to put μprocessor, since we can
millions of transistors on a single die. It program and give instruction to
enables designers to put SoC that move the microprocessor to do
everything from the board onto the whatever you want to do.
chip eventually.

SoC is the efforts to integrate

heterogeneous or different
types of silicon IPs on to the
same chip, like memory, up,
random logics, and analog
circuitry.

All of the above are partially right, but not very accurate!!!
Seminar on System on Chip
 What is SoC ?
SoC not only chip, but more on “system”.
SoC = Chip + Software + Integration

AAtypical
typicalSoC
SoCconsists
consistsof:
of:
••One
Onemicrocontroller,
microcontroller,one onemicroprocessor
microprocessorororDSP
DSPcore(s).
core(s).
••Memory
Memoryblocks
blocks: :ROM,
ROM,RAM,
RAM,EEPROM
EEPROMandandFlash.
Flash.
••Timing
Timingsources
sources: :oscillators
oscillatorsand
andphase-locked
phase-lockedloops.
loops.
••Peripherals
Peripherals: :Counter
Counter&&real-time
real-timetimers
timers&&power-on
power-onresetresetgenerators.
generators.
••External
Externalinterfaces
interfaces:USB,
:USB,FireWire,
FireWire,Ethernet,
Ethernet,USART,
USART,SPI.
SPI.
••Analog
Analoginterfaces
interfaces: :ADCs
ADCsandandDACs.
DACs.
••Voltage
Voltageregulators
regulatorsandandpower
powermanagement
managementcircuits.
circuits.

Seminar on System on Chip

 Components of SoC
Hardware
Hardware Software
Software
 Processor
Processor

 System
Systembus
bus The
Theoperating
operatingsystem
system

 Timers
Timers Board
BoardSupport
SupportPackage
Package

 LCD
LCDcontrollers
controllers Device
Devicedrivers
drivers

 External
ExternalInterfaces
Interfacesfor
forUSB
USB Middleware
Middlewarecomponents
components

 Power
Powermanagement
managementcircuits
circuits Multimedia
Multimediaengines
engines

 Interrupt
InterruptController
Controller Application
Applicationsoftware
software

Seminar on System on Chip

 Rich SoC Ecosystem for Embedded and
Communications

Seminar on System on Chip

 SoC Architecture
The generic
The generic architecture:
architecture: Processor,
Processor, system
system bus,
bus, timers,
timers, memory,
memory, interrupt
interrupt
controllerand
controller andpower
powermanagement
managementcircuits.
circuits.
Optional:LCD
Optional: LCDcontrollers,
controllers,USB
USBinterface,
interface,Flash
Flashmemory
memoryinterfaces
interfaces

Toachieve
To achievebetter
bettermultimedia
multimediaexperience
experience: :
DEDICATEDDSP:
DEDICATED DSP:
•• The
TheAudio
Audio&&Video
Videoprocessing
processingshared
sharedbetween
between main
mainprocessor
processorandandDSP.
DSP.
•• Allows
Allowsmore
moregeneric
genericapplication
applicationof
ofSoC
SoCand
andalso
alsoscalability
scalabilityininfuture.
future.
•• Increase
Increaseininsize
sizeof
ofchip
chipand
and increase
increaseininpower
powerutilization.
utilization.

DEDICATEDBLOCKS:
DEDICATED BLOCKS:
•• Dedicated
Dedicatedhardware
hardwareblocks
blocksfor
forMP3
MP3&&H.264
H.264decoding,
decoding,MPEG4
MPEG4encoding.
encoding.
•• More
Moreoptimized
optimizedininterms
termsof
ofsize
sizeand
andpower.
power.
•• But
Butapplication
applicationand
andscalability
scalabilitylimited.
limited.

Seminar on System on Chip

 System on Chip cores
•• One
One solution
solution to
to the
the design
design productivity
productivity gap
gap isis to
to make
make ASIC
ASIC
designs more
designs more standardized
standardized by
by reusing
reusing segments
segments of of previously
previously
manufacturedchips.
manufactured chips.

•• These
These segments
segments are
are known
known as
as “blocks”,
“blocks”, “macros”,
“macros”, “cores”
“cores” or
or
“cells”.Cores
“cells”. Coresare
arethe
thebasic
basicbuilding
buildingblocks.
blocks.

•• The
Theblocks
blockscan
caneither
eitherbe
bedeveloped
developedin-house
in-houseor
orlicensed
licensedfrom
froman
an
IPcompany.
IP company.

Seminar on System on Chip

 System on Chip cores
Synthesizable RTL or netlist
of generic library elements.
User responsible for the
implementation and layout. SoC
CORES
Optimized for performance,
power, size and mapped to a
Optimized for performance specific process technology
FIRM
and area by floor planning and Exist as fully placed and routed
MACRO
placement. netlist and as a fixed layout such
As synthesized code or as a as in GDSII format .
netlist of generic library
elements.

HARD SOFT
MACRO MACRO

Seminar on System on Chip

 Solution is Design Re-use
• Overcome complexity and verification issues by designing
Intellectual Property (IP) to be re-usable .
• Done on such a scale that a new industry has been developed.
Designactivity
Design activityisissplit
splitinto
intotwo
twogroups:
groups:

IP
 IPAuthors
Authors––producers
producers::
•• Producefully
Produce fullyverified
verifiedIPIPlibraries
libraries. .
•• Thusmaking
Thus makingoverall
overallverification
verificationtask
taskmore
moremanageable.
manageable.

IP
 IPIntegrators
Integrators––consumers
consumers::
•• Select,evaluate,
Select, evaluate,integrate
integrateIPIPfrom
frommultiple
multiplevendors
vendors
•• IPIPintegrated
integratedonto
ontoIntegration
IntegrationPlatform
Platformdesigned
designedwith
withspecific
specific
applicationininmind
application mind

Seminar on System on Chip

 System on Chip interconnection
Design
 Design reuse
reuse isis facilitated
facilitated ifif “standard”
“standard” internal
internal
connectionbuses
connection busesareareused
used..
All
 Allcores
coresconnect
connecttotothe
thebus
busvia
viaaastandard
standardinterface
interface..
Any-to-any
 Any-to-anyconnections
connectionseasy easybut
but……
Not
 Notall
allconnections
connectionsare
arenecessary
necessary..
Global
 Globalclocking
clockingscheme
scheme..
Power
 Powerconsumption
consumption..
Standardization
 Standardization isis being
being addressed
addressed by
by the
the Virtual
Virtual
SocketInterface
Socket InterfaceAlliance
Alliance(VSIA).
(VSIA).

Seminar on System on Chip

 I/O Interconnection
Interconnection Network

Dynamic Static

Bus Switched Point-to- Arbitrated or Fully

point Routed connected

Blocking Non-Blocking Ring Hub Tree Mesh

Omega Benes Clos Cross-bar

Seminar on System on Chip

 System on Chip Interconnection

AMBA
Advanced Microcontroller Bus Architecture

APB ASB AHB

Advanced Peripheral Advanced High
Bus Advanced System Bus Performance Bus

Seminar on System on Chip

 SoC Design Flow

The
 The design
design flow
flow for
for an
an SoC
SoC aims
aims to
to develop
develop this
this
hardwareand
hardware andsoftware
softwareininparallel.
parallel.

The
 The hardware
hardware blocks
blocks are
are put
put together
together using
using CAD
CAD
tools; the
tools; the software
software modules
modules are
are integrated
integrated using
using aa
softwaredevelopment
software developmentenvironment.
environment.

Seminar on System on Chip

 Design
Flow

Major Steps:
HW& SW co-
design
Emulation
Synthesis
Simulation
Layout
Timing ECO
Verification

Seminar on System on Chip

 SoC Characteristics
Process
 ProcessTechnology:
Technology:
•• Manufactured
ManufacturedCMOS
CMOSprocess
processtechnology.
technology.
•• Optimized
Optimizedfor
forhigher
higherspeed,
speed,lower
lowerpower
powerconsumption.
consumption.

Die
DieSize:
Size:
••Physical
Physicalsurface
surfacearea
areaof
ofthe
theSiSito
tomake
makeaasingle
singleIC.
IC.
••Translated
Translateddirectly
directlyto
tocost.
cost.
••Require
Requireperformance
performancevs.vs.die
diesize
sizedecisions.
decisions.

Power:
 Power:
••Most
Mosthandheld
handhelddevices
devicesrun
runon
onbattery
batterypower
power. .
••Power
Powermanagement
managementininSoCs
SoCsisisaacomplex
complextask
task faced.
faced.

Seminar on System on Chip

Continued…
 SoC Characteristics
Hardware
HardwareSoftware
SoftwarePartitioning:
Partitioning:
••HW
HW faster
fasterthan
thanSW SW
••Large
Largeamount
amountof ofparallel
parallelprocessing
processingininHW
HW
••Limited
Limitedflexibility
flexibilityininHW.
HW.
••Bug
Bugfound
foundininHW
HWrequire
require expensive
expensivere-spin
re-spin

Operating
OperatingSystem:
System:
•• Dictated
Dictatedby
bythe
theapplication
applicationof
ofthe
theSoC
SoC
•• Choice
Choiceof
ofthe
thetarget
targetcustomers.
customers.

Seminar on System on Chip

 The Benefits
 There are several benefits in integrating a large digital system
into a single integrated circuit which includes:

 Lower
Lowercost
costper
pergate
gate..
 Lower
Lowerpower
powerconsumption
consumption..
 Faster
Fastercircuit
circuitoperation
operation..
 More
Morereliable
reliableimplementation
implementation..
 Smaller
Smallerphysical
physicalsize
size..
 Greater
Greaterdesign
designsecurity
security..
 Easy-to-incorporate
Easy-to-incorporatemodern
modernprotocols
protocolsand
andinterfaces.
interfaces.
 Porting
PortingPCPCsoftware
softwareononembedded
embeddedsystems.
systems.

Seminar on System on Chip

 The Drawbacks
 The principle drawbacks of SoC design are
associated with the design pressures imposed
on today’s engineers , such as :


 Time-to-marketdemands
Time-to-market demands..

 Exponentialfabrication
Exponential fabricationcost
cost..

 Increasedsystem
Increased systemcomplexity
complexity..

 Increasedverification
Increased verificationrequirements
requirements..

Seminar on System on Chip

 Major SoC Applications
 Speech Signal Processing .
 Image and Video Signal Processing .
 Information Technologies
 PC interface (USB, PCI,PCI-Express, IDE)
 Computer peripheries (printer control, LCD monitor controller,
DVD controller)
 Data Communication
 Wireline Communication: 10/100 Based-T, xDSL, Gigabit
Ethernet.
 Wireless communication: BlueTooth, WLAN, 2G/3G/4G, WiMax,
UWB.

Seminar on System on Chip

 Example: System-On-a-Chip
Intel EP80579 ®

45%
45%Smaller
SmallerFootprint
Footprintwith
with34%
34%Lower
LowerPower
Power Full
Full Feature
Feature SoC
SoC
•4
•4 chips
chips to
to 11 for
for smaller
smaller form
form factors
factors •Integrated
•Integrated memory
memory controller
controller
•11
•11 to
to 21
21 watts
watts •Flexible
•Flexible integrated
integrated I/O
I/O
•600MHz
•600MHzto to 1.2GHz
1.2GHz •TDM
•TDM && analog
analog voice
voice connectivity
connectivity

Embedded
Embedded Requirements
Requirements Intel®QuickAssist
Intel®QuickAssist Technology
Technology
•7
•7 year
year extended
extended life
life cycle
cycle support
support •Integrated
•Integrated accelerators
accelerators
•Industrial
•Industrial temp.
temp. •Software
•Software for
for security
security&& VoIP
VoIP
•Intel
•Intel Architecture
Architecture compatible
compatible •• security
securityprocessing
processing
•Multiple
•Multiple operating
operatingsystems
systems

Seminar on System on Chip

 Summary
 Technological advances mean that complete systems can now
be implemented on a single chip.

 The benefits that this brings are significant in terms of speed ,

area and power .

 The drawbacks are that these systems are extremely complex

requiring amounts of verification .

 The solution is to design and verify re-useable IP .

Seminar on System on Chip

 Seminar: System on Chip

Thank You

Seminar on System on Chip

 Seminar: System on Chip

Questions ?

Seminar on System on Chip