MASM : Microsoft Macro

Assembler
Introduction to 8086
Microprocessor Lab
4th semester BE Course

Kalpataru Institute of Technology

 Features of 8086 Microprocessor
16 bit microprocessor
16 bit data bus; can also handle 8 bit data.
20 bit address bus; can point to 220 memory locations. (Physical address)
Total 14 registers.
4 General purpose registers: AX, BX, CX, DX
4 Segment registers : DS, CS, SS, ES
2 Index registers : SI, DI
3 Pointer registers : SP, BP, IP
1 Flag register
Architecture
BUS INTERFACE UNIT (BIU)
Contains
6-byte Instruction Queue (Q)
The Segment Registers (CS, DS, ES, SS).
The Instruction Pointer (IP).
The Address Summing block ()

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 THE QUEUE (Q)
The BIU uses a mechanism known as an instruction stream queue to
implement a pipeline architecture.

This queue permits pre-fetch of up to 6 bytes of instruction code. Whenever

the queue of the BIU is not full, it has room for at least two more bytes and at
the same time the EU is not requesting it to read or write operands from
memory, the BIU is free to look ahead in the program by pre-fetching the next
sequential instruction.

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 These pre-fetching instructions are held in its FIFO queue. With its 16 bit
data bus, the BIU fetches two instruction bytes in a single memory cycle.

After a byte is loaded at the input end of the queue, it automatically shifts up
through the FIFO to the empty location nearest the output.

The EU accesses the queue from the output end. It reads one instruction
byte after the other from the output of the queue.

The intervals of no bus activity, which may occur between bus cycles are
known as Idle state.

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 8086 has two blocks BIU and EU.

The BIU handles all transactions of data and addresses on the buses for EU.

The BIU performs all bus operations such as instruction fetching, reading and writing operands for
memory and calculating the addresses of the memory operands. The instruction bytes are transferred to
the instruction queue.

EU executes instructions from the instruction system byte queue.

Both units operate asynchronously to give the 8086 an overlapping instruction fetch and execution
mechanism which is called as Pipelining. This results in efficient use of the system bus and system
performance.

BIU contains Instruction queue, Segment registers, Instruction pointer, Address adder.

EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index register, Flag register.
EXECUTION UNIT
Decodes instructions fetched by the BIU
Generate control signals,
Executes instructions.

The main parts are:

Control Circuitry
Instruction decoder
ALU
EXECUTION
EXECUTION UNIT
UNIT General
General Purpose
Purpose Registers
Registers
16 bits

8 bits 8 bits

AH AL
AX Accumulator

BH BL Base
BX
CH CL Count
CX

DX DH DL
Data
SP Stack Pointer
Pointer
BP Base Pointer

SI
Source Index
Index
DI Destination Index
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 Registers revisited
4 General purpose registers: AX, BX, CX, DX
AX - AH and AL (Accumulator)
BX - BH and BL (Can also be address reg. for DS)
CX - CH and CL (Usually counter)
DX - DH and DL (Can also to hold 16 bit address in IO operations)

4 Segment registers (Minimum 64k size for each)

DS - Data segment (To store data)
CS - Code segment (To store program)
SS - Stack segment
ES - Extra segment (For string operations)
 2 Index registers
SI - Source index
DI - Destination index (Both usually refers to data segment)
(Can also be used to store data)

3 Pointer registers
SP - Locates the top of the stack
BP - Base pointer (Default refers to Stack segment)
IP - Instruction pointer (Points to the instruction in CS)

1 Flag register
9 active bits and 7 not used
 EXECUTION UNIT Flag Register

A flag is a flip flop which indicates some conditions produced by the execution of
an instruction or controls certain operations of the EU .
In 8086 The EU contains
a 16 bit flag register
9 of the 16 are active flags and remaining 7 are undefined.
6 flags indicates some conditions- status flags
3 flags control Flags
U U U U OF DF IF TF SF ZF U AF U PF U CF

Sign Auxiliary Carry

Interrupt Trap Zero Parity
Over flow Direction

U - Unused
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 Common commands used
To open new/existing file: c:\8086>edit filename.asm

For execution:

c:\8086>masm/zi filename.asm;

c:\8086>link/co filename.obj;

c:\8086>cv/p filename.exe
 Use of Functional keys for execution
F5 - Execute program to the end

F8 - Step one line; go into procedure calls

F9 - Set or clear a breakpoint on the cursor line

F10 Step one line, but go over procedure calls

F4 Toggle output screen

F2 - Toggle register window

 Sample program
.model small mov ax, 00h
.data mov al, num1
num1 db 63h
add al, num2
num2 db 10h
mov result, ax
result dw 00h

mov ah, 4ch

.code
int 21h
mov ax,
end
@data
mov ds, ax
Block move (with and without overlap)
Without overlapping
.MODEL SMALL With overlapping

.DATA .MODEL SMALL

SRC DW 1111H,2222H,3333H .DATA

NUMS DB 10H,20H,30H,40H,50H,60H,70H,80H,90H
DST DW 0AAAAH,0BBBBH,0CCCCH BACK: MOV AL,[SI]
.STACK
N EQU 3 MOV[DI],AL
.STACK
.CODE DEC SI
START: MOV AX,@DATA DEC DI
.CODE
MOV DS,AX DEC CX
START: MOV AX,@DATA LEA SI,NUMS JNZ BACK
MOV DS,AX LEA DI,NUMS
MOV AH,4CH
MOV ES,AX INT 21H
MOV CX,10
END START
CLD DEC CX

MOV CX,N ADD DI,03H

LEA SI,SRC ADD SI,CX

ADD DI,CX
LEA DI,DST
INC CX
REP MOVSW
MOV AH,4CH
INT 21H
END START
 Block interchange
.MODEL SMALL
.DATA
N EQU 0AH
BLK1 DB
0AAH,0AAH,0AAH,0AAH,0AAH,0AAH,0AAH,0AAH,0AAH, MOV [SI],DH ;move value of DH to SI
0AAH MOV [DI],DL ; move value of DL to DI
BLK2 DB INC SI ; increment source pointer
0BBH,0BBH,0BBH,0BBH,0BBH,0BBH,0BBH,0BBH,0BBH,
0BBH INC DI ; increment destination pointer

.STACK
DEC CX ; decrement counter
.CODE
JNZ NEXT ; jump if no zero to NEXT
START:
MOV AH,4CH ; terminate the program
MOV AX,@DATA
INT 21H
MOV DS,AX
END START
MOV ES,AX ; initialize extra segment
MOV CX,N ; initialize the count
LEA SI,BLK1 ; load effective address of BLK1 to SI
reg
LEA DI,BLK2 ; load effective address of BLK2 to DI