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PIC : ADDRESSING MODE

Most common fields found


in instruction format are :

1.OPERATION CODE

2.ADDRESS FIELD

3.MODE FIELD
Operation field of instruction :
specifies operation to be
performed.

This operation = must be


executed on some data stored
in registers/memory words

The way operands are chosen =


depends on ADDRESSING MODE
IMPLIED MODE
OPERANDS are specified IMPLICITLY in
definition of instruction.

EXAMPLE : INSTRUCTION : COMPLEMENT


ACCUMULATOR

Operand in accumulator register is implied


in definition of instruction

All register reference instructions that use


an accumulator are implied mode
instructions.
IMMEDIATE MODE
Operand is specified in
instruction itself

Operand is part of instruction


Operand = address field
e.g. ADD 5
Add 5 to contents of
accumulator
5 is operand
REGISTER MODE
Operand is held in register named
in address field
REGISTER INDIRECT MOD
Operand is in memory cell pointed to by
contents of register R
AUTOINCREMENT OR AUTODECREMENT MODE

Similar to register indirect mode


EXCEPT that register is
incremented or decremented after
(or before) its value is used to
access memory.
DIRECT ADDRESS MODE
Address field contains address of
operand

Effective address (EA) = address


field (A)

Single memory reference to


access data

No additional calculations to work


out effective address
NDIRECT ADDRESS MODE
Address field gives the address where the
effective address is stored in memory.
ELATIVE ADDRESS MODE
Content of Program counter + Address part of
instruction

Example :

PC = 825

Address part = 24

Instruction at location 825 is read from


memory during fetch phase and

PC= 826

Effective address = 826 + 24 = 850 // 24


INDEXED ADDRESS MOD
Content of index register + address
part of instruction

Index register = special register that


contains index value

Address field = defines the beginning


address of a data array.

Index register can be incremented to


facilitate access to consecutive
elements.
ASE REGISTER ADDRESSING MOD

Content of base register + address


part

Base register = similar to index


register

Only difference : Index register used to


hold index number

Base register holds a base


address
200 Load to Mode
PC=200 201 AC Address=
500
Next
202
R1=400 Instruction

399 450
400 700
XR=100

500 800
AC

600 900

702 325

800 300
DIRECT ADDRESS MODE

EFFECTIVE ADDRESS = 500

OPERAND LOADED = 800

IMMEDIATE MODE

Second word is taken as operand rather than address

So 500 is loaded into AC

Effective address = 201

INDIRECT MODE

Effective address =800

Operand = 300
RELATIVE MODE

EFFECTIVE ADDRESS = 500 + 202=702

OPERAND = 325

INDEX MODE

EFFECTIVE ADDRESS = XR + 500 = 100 +500=600

OPERAND = 900

Register mode

Operand is in R1 and 400 is loaded into AC

No effective address

REGISTER INDIRECT MODE

Effective address =400=content of R1


Operand = 700
AUTOINCREMENT MODE

Same as register indirect mode except R1 is


incremented to 401 after execution of instruction

AUTODECREMENT MODE

Decrements R1 to 399 prior to execution

Operand loaded into AC = 450


OPIC : INSTRUCTION FORMAT
Format of instruction = depicted in
rectangular box symbolizing bits as they
appear in memory word.

Bits of instruction are divided into


groups called FIELDS.

Most common fields :

1Operation Code : specifies operation


to be performed

2Address Field : designates a memory


address or processor register
egister address
Operations specified by computer instructions
are executed on some data STORED IN MEMORY
OR PROCESSOR REGISTERS.

Operands residing in memory : specified by


their memory address

Operands residing in processor registers :


specified by register address

Register address : binary number of k bits that


defines one of 2k registers in CPU.

Example : CPU with 16 processor registers R0


through R15 will have a register address field of
four bits.
Computers may have instructions of
several different lengths containing
varying number of addresses.

No of address fields in instruction format


depends on internal organization of its
registers.

Most computers fall into one of three


types of organization :

1..SINGLE ACCUMULATOR ORGANIZATION

2GENERAL REGISTER ORGANIZATION


SINGLE ACCUMULATOR ORGANIZATION
All operations are performed with an
implied accumulator register.

Instruction format = uses one address


field.

Example : ADD X

X = address of operand

Interpretation : AC <- AC + M[X] //


AC is accumulator register and M[X]
memory word at address X
GENERAL REGISTER ORGANIZATION

Instruction format needs three register


address fields.

Example : ADD R1,R2,R3

INTERPRETATION : R1 <- R2 + R3

NO OF ADDRESS FIELDS CAN BE REDUCED


FROM THREE TO TWO IF DESTINATION
REGISTER IS SAME AS ONE OF SOURCE
REGISTERS.

EXAMPLE : ADD R1 , R2

INTERPRETATION : R1 <- R1 + R2
EXAMPLE : MOV R1,R2

INTERPRETTAION : R1 <- R2 OR
R2 <- R1

EXAMPLE : ADD R1, X

INTERPRETATION : R1 <- R1 + M[X]


//Two address fields one for
register R1 and other for memory
address X
STACK ORGANIZATION

Computers with stack organization would have


PUSH and POP instructions which require an
address field.

Example : PUSH X //pushes the word X to the


top of stack

Stack pointer is updated automatically.

Example : ADD //This instruction contains


only operation code with no address field

This operation has effect of popping the two


numbers from stack, adding numbers ,pushing
sum into stack.
TYPES OF INSTRUCTIONS
Evaluate X= (A+B) * (C+D)
Three address
Computers with three address instrn format can use each
address field to specify either a processor register or a
memory operand.
Two address
Here also each address field can specify either a
processor register or a memory word.
One address
They use an implied accumulator register for all
data manipulations.

T is address of temporary memory location required for


storing intermediate result.
Zero address
Absence of address field

TOS : TOP OF STACK

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