Unit III

Real World Interfacing with

ARM7 Based Microcontroller
 Interfacing the peripherals to LPC2148

GSM and GPS using UART

On-chip ADC using interrupt (VIC)
EEPROM using I2C
SDCARD using SPI
On-chip DAC for waveform generation
 Interfacing GSM using UART
GSM : Global System for Mobile Communication
GSM is digital mobile telephony system
GSM digitize and compresses data
 Interfacing GSM using UART

GSM MAX ARM 7

Module 232 LPC2148
Interfacing GSM using UART

MAX ARM 7
232 LPC2148
 Interfacing GSM using UART
Interfacing Signals: RxD, TxD, Gnd
Maximum Characters/SMS 140
AT commands are used to send and receive
SMS.
 AT Commands
AT commands are used to control MODEMs.
AT is the abbreviation for Attention.
Case Sensitivity - The AT commands are
generally used in uppercase letters.
 AT Commands
AT commands are used to control MODEMs.
AT is the abbreviation for Attention.
Case Sensitivity - The AT commands are
generally used in uppercase letters.
 AT Commands
Single Command - The extended AT
commands have a + in the command name.
For example: AT+CGMI<Carriage return>
 AT Commands
Command Line - Multiple AT commands can be sent
to MODEM in a single command line.
AT+CGMI; +CBS<Carriage return>.
 AT Commands
For Sending SMS:
1. First select the text mode for SMS- AT+CMGF = 1 .
2. Send mobile number to the GSM Modem
AT+CMGS =+923005281046
3. Send the text message string ("hello!")
4. Send ASCII code for CTRL+Z i.e., 0x1A to GSM
Modem to transmit the message to mobile phone.
5. Every AT command is followed by i.e. carriage
return and line feed
 GPS Interfacing
GPS receivers use a group of satellites and
ground stations to compute position and time
almost anywhere on earth.
GPS Receiver Module
 GPS Receiver Module
Once a GPS module is powered, NMEA
(National Marine Electronics Association) data
is sent out of a serial transmit pin (TX) at a
specific baud (4800 bps) rate.
 GPS
The data given by the GPS receiver includes
many information like position (latitude and
longitude), altitude, speed, time etc.
 GPS
The GLLdataset (geographic position
latitude/longitude) contains information on
latitude and longitude, time and health.
Example of a GLL dataset:
$GPGLL,4717.115,N,00833.912,E,130305.0,A*
32<CR><LF>
 On chip ADC
Features

10 bit successive approximation analog to digital

converter (one in LPC2141/2 and two in LPC2144/6/8).

Input multiplexing among 6 or 8 pins (ADC0 and ADC1).

Power-down mode.

Measurement range 0 V to VREF (typically 3 V; not to

exceed VDDA voltage level).
 On chip ADC
Features
10 bit conversion time 2.44 s.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition on input pin or Timer
Match signal.
A/D Data Register
A/D Interrupt Enable Register
 Interrupts
An interrupt request is asserted to the
Vectored Interrupt Controller (VIC) when the
DONE bit is 1.

Software can use the Interrupt Enable bit for

the A/D Converter in the VIC to control
whether this assertion results in an interrupt.

DONE is negated when the ADDR is read.

 Vector Interrupt Controller
Features
32 interrupt request inputs
16 vectored IRQ interrupts
16 priority levels dynamically assigned to interrupt
requests
Software interrupt generation
 Interrupt Enable register

When this register is written, ones enable interrupt requests,

zeroes have no effect.
 Vector Control registers 0-15
Each of these registers controls one of the 16 vectored IRQ
slots. Slot 0 has the highest priority and slot 15 the lowest.
 Vector Address registers 0-15
These registers hold the addresses of the Interrupt
Service routines (ISRs) for the 16 vectored IRQ slots.
Interrupt sources
Interrupt sources
 #include <LPC21xx.h>
#include <board.h>
int main(void)
{
*PINSEL1 = *PINSEL1 & 0XFCFFFFFF;
*PINSEL1 = *PINSEL1 | 0X01000000; // Select P0.28 as AD0.1
*ADCR = 0X01210302;
*AD0INTEN = 0x02 ;
*IODIR0=0x007F8000;
*IOCLR0=0x00000000;
*IOSET0=0x00000000;
*VICIntEnable = (1<<18) ; //enable AD0
*VICVectCntl0 = (1<<5) | 18 ;
*VICVectAddr0 = (unsigned) AD0ISR;
while(1)
{Delay(100);}
return 0;
}
__irq void AD0ISR(void) //AD0 Interrupt Function
{
int adcdata = (*ADDR&0X0000FFC0);
adcdata=adcdata<<7;
*IOSET0=adcdata;
*IOCLR0=~adcdata;
VICVectAddr = 0x0; //Signal that ISR has finished
}
Interrupts
An interrupt request is asserted to the Vectored Interrupt
Controller (VIC) when the DONE bit is 1. Software can use the
Interrupt Enable bit for the A/D Converter in the VIC to control
whether this assertion results in an interrupt. DONE is negated
when the ADDR is read.
 DAC
Features
10 bit digital to analog converter
Resistor string architecture
Buffered output
Power-down mode
Selectable speed vs. power
DAC Register
 int main(void)
{ unsigned char index=0,size;
unsigned char lut[]={0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,
0x88,0x99,0xAA,0xBB,0xCC,0xDD,0xEE,0xFF};
size=sizeof(lut);
*PINSEL1 = 0x2 << 18;
while(1)
{ while(index < (size-1))
{ *DACR = lut[index] << 6;
index++; }
while(index > 0)
{ *DACR = lut[index] << 6;
index--; }
} return 0;
}
 Interfacing EEPROM using I2C
AT24C512 (Two-wire Serial EEPROM)
512K is internally organized as 512 pages of 128-
bytes each.
Bidirectional Data Transfer Protocol
Write Protect Pin for Data Protection
High Reliability
Endurance: 100,000 Write Cycles
Data Retention: 40 Years
AT24C512
AT24C512
I2C Protocol
 I2C Control Set Register
When a one is written to a bit of this register, the
corresponding bit in the I2C control register is set. Writing a
zero has no effect on the corresponding bit in the I2C control
register.
 I2C Control Clear Register
The I2CONCLR registers control clearing of bits in the I2CON
register that controls operation of the I2C interface. Writing a
one to a bit of this register causes the corresponding bit in the
I2C control register to be cleared. Writing a zero has no effect.
 I2C Control Clear Register
This register contains the data to be transmitted or the data
just received.
I2C SCL High Duty Cycle Register

I2C SCL Low Duty Cycle Register

 I2C Status Register
I2C Status register reflects the condition of the I2C interface.
I2C Status Register
 #include <board.h>
#include "address_c.h"
#include "functions.h"

#define I2EN 0x40

#define STA 0x20
#define STO 0x10
#define SI 0x08
#define AA 0x04

#define I2ENC 0x40

#define STAC 0x20
#define STOC 0x10
#define SIC 0x08
#define AAC 0x04

int data[200],length=0,i=0;
char var='A';
char ivar='a';
 int main(void)
{
i2c_init();
i2c_eeprom_write(0,0,0,26);
i2c_eeprom_read(0,0,0,26);
return 0;
}

void i2c_init()
{
*PINSEL0 = *PINSEL0 & 0XFFFFFF0F; // SELECT THE PIN for I2C
*PINSEL0 = *PINSEL0 | 0X00000050;
*I2CONCLR = I2ENC | STAC | STOC | SIC | AAC;
*I2SCLH = 150; //set the bit frequency to 50 khz
*I2SCLL = 150;
}
 void i2c_eeprom_write(u8 dev_addr,u8 page_no,u8 page_offset,u32 no_bytes)
{
*I2CONSET = I2EN;
delay(1000);
*I2CONSET = STA;
wait_for_ack(0x08); // I2C state change
*I2DAT = 0XA0; // transmit slave address with write bit
*I2CONCLR = SIC;
*I2CONCLR = STAC; // clear the START bit to avoid retransmition of START
wait_for_ack(0x18);
*I2DAT = page_no; // transmit page address
*I2CONCLR = SIC;
wait_for_ack(0x28);
*I2DAT = page_offset; // transmit offset within the page
*I2CONCLR = SIC;
 while(no_bytes > 0)
{
wait_for_ack(0x28);
*I2DAT = var++;
no_bytes--;
*I2CONCLR = SIC;
}
wait_for_ack(0x28);
*I2CONCLR = SIC;
*I2CONSET = STO ;

 while(!(*I2CONSET & SI))

{
*I2CONSET = STA; // do acknowledge polling
delay(100);
*I2DAT = 0XA1;
while(1)
{
if(*I2CONSET & SI)
break;
}

}
*I2CONCLR = I2ENC | STAC | STOC | SIC | AAC;
}
 void i2c_eeprom_read(u8 dev_addr,u8 page_no,u8 page_offset,u32 no_bytes)
{ length = no_bytes;
*I2CONSET = I2EN ;
delay(1000);
*I2CONSET = STA;
wait_for_ack(0x08);
*I2CONCLR = STAC;// clear the START bit to avoid retransmit of START
*I2DAT = 0XA0;
*I2CONCLR = SIC;
wait_for_ack(0x18);
*I2DAT = page_no;
*I2CONCLR = SIC;
wait_for_ack(0x28);
*I2DAT = page_offset;
*I2CONCLR = SIC;
wait_for_ack(0x28);

 I2CONCLR = SIC;
I2CONSET = STA ;
wait_for_ack(0x10);
I2CONCLR = STAC; //put the address and the read bit
I2CONSET = AA;
I2DAT = 0XA1;
I2CONCLR = SIC;
wait_for_ack(0x40);
I2CONCLR = SIC;
while(no_bytes>0)
{ wait_for_ack(0x50);
data[no_bytes] = *I2DAT;
no_bytes--;
I2CONCLR = SIC;
}
wait_for_ack(0x50);
I2CONCLR = AAC;
I2CONCLR = SIC;
wait_for_ack(0x58);
I2CONSET =STO ;
I2CONCLR = I2ENC | STAC | STOC | SIC | AAC;
read_data();
}
 void read_data()
{
q_printf("\n\n Final Data read from the Slave::\n\n ");
int i=0;
for(i=length;i>0;i--)
{
q_printf(" %c", data[i]);
}
}
 void wait_for_ack(u32 status)
{
while(1)
{
if(*I2CONSET & SI)
{
if(*I2STAT == status)
{
break;
}
else
{
q_printf("\n ERROR STATUS RECEIVED = ");
q_printf("%x", *I2STAT);
*I2CONSET = STO;
*I2CONCLR = 0xFF;
asm("b loop_forever");
}
}
}
}
 SD Card Interfacing using SPI
Secured Digital Memory Card

The data is transferred between the memory card and the

host controller as data blocks in units of 512 bytes.

High speed SD clock (up to 25 MHz), data storage media.

Serial Peripheral Interface (SPI) signals

CS: Host to card Chip Select signal
CLK: Host to card clock signal
MOSI: (Master Out Slave In) Host to card single bit data signal
MISO: (Master In Slave Out) Card to host single bit data signal
SPI Communication
SPI Interface
SPI Interface
 SPI initialization
GPIO setting. The SPI pins, CLK, CS, MOSI, MISO need to be
configured through pin select and GPIO registers, PINSEL1, IODIR0,
and IOSET0, before configuring the SPI interface.

SPI frame format and data size. The SPI format and data size can
be configured through setting the proper clock polarity bit (CPOL)
and clock phase bit (CPHA) and data size field (DSS) in the SSP
control registers (SSPCR0). The data size is set to 8 bits/frame, and
both CPOL and CPHA bits are set to zero.

SPI enable/disable. The SSP port should be disabled before the

GPIO pin setting, clock pre-scale setting, frame format
configuration, and enabled after all the configuration is done to
ensure a clear start.