Analog and Digital VLSI Design

EEE F313/INSTR F313

Tutorial 2- Layouts
 Layout
cut line

p well Cross Section

Layout GDS-2
 Layouts
Layout of an inverter
 Layouts
Stick Diagram
Polysilicon
P diffusion
n diffusion
Metal 1
Metal Via
 Layouts
Stick Diagram
Polysilicon
P diffusion
n diffusion
Metal 1
Metal Via
 Layouts
Draw the stick diagram for NAND gate
Polysilicon
P diffusion
n diffusion
Metal 1
Metal Via
 Layouts
Draw the stick diagram for NOR gate
Polysilicon
P diffusion
n diffusion
Metal 1
Metal Via
Complete the Following Layout (CMOS Design)

Vdd
Metal

P-Diffusion
A B
Polysilicon

Metal Via

OUT

Thank You
The Function Implemented by the following CMOS
Design
Vdd
Metal-2
Metal-1

A D B C C P-Diffusion

Polysilicon

Metal Via
N-Diffusion
OUT

Thank You Gnd

Identify the Gate and Draw the Stick diagram for the same.

Vdd

F
A B
 Layouts
Implement A + BC using CMOS logic style and Draw the
layout for the same.
Polysilicon
P diffusion
n diffusion
Metal 1
Metal Via
1.For a given IC the following data are provided
IOH = 1mA, IIH = 0.05 mA, IOL = 20mA IIL = 2mA
calculate the fan-out

2. For a given IC VCC = 5 V, ICCH = 10mA, ICCL =

20mA, calculate the power dissipation

3. For tpHL = 20ns, tpLH = 10ns find tp

4. VOH(min) = 2.7V VIH(min) = 2V, VIL(max) = 0.8V,

VOL(max) = 0.5V Calculate Noise margin
Thank You