Professional Documents
Culture Documents
Design
Emre Yengel
Fall 2012
Standard Cell Layout Methodology
Layout
Unit Transistor
A conservative but easy to use Design Rules for n-well process is as follows:
• Contacts are 2 λ X 2 λ and must be surrounded by 1 λ on the layers above and below
A simple method for finding the optimum gate ordering is the Euler-path
method: Simply find a Euler path in the pull-down network graph and a Euler
path in the pull-up network graph with the identical ordering of input labels, i.e.,
find a common Euler path for both graphs.
The Euler path is defined as an uninterrupted path that traverses each edge
(branch) of the graph exactly once.
Finding an Euler’s Path
Computer Algorithms:
• It is relatively easy for a computer to consider all possible arrangements of
transistors in search of a suitable Euler path.
This is not so easy for the human designer.
x Vertex b c
x
Edge a
Out
y
y c
Vertex a
Gnd
Euler Path
Stick Diagrams
Metal
poly
ndiff
pdiff
Can also draw
in shades of
gray/line style.
Stick Diagrams
Example
Example
Example
Example
Example
Example
Example
Example
Example
Example
Example
Example
Example
Example 2
Example 3
Example 3