You are on page 1of 75

CPU

Abstraction
bit
Computer family
Memory
data path
control
Desktop (personal computer)
Embedded systems
server
LAN
WAN
Super computer
DRAM
Defect
chip
Transistor
DVD
yield
Assembler
Operating System
Compiler
VLSI
Instruction
cache
Instruction set architecture
Semiconductor
Wafer
Q: What is length of the ASCII character?
ANS: 7bits and 128 characters
Q: Define DR,PC, AR, AC, TR, INPR,OUTR
Instruction register.
ANS:
• DR 16 Data Register Holds memory operand
• AR 12 Address Register Holds address for memory
• AC 16 Accumulator Processor register
• IR 16 Instruction Register Holds instruction code
• PC 12 Program Counter Holds address of instruction
• TR 16 Temporary Register Holds temporary data
• INPR 8 Input Register Holds input character
• OUTR 8 Output Register Holds output character
Q: Define basic performance equation.
T=NXS/R
• T – processor time required to execute a program
that has been prepared in high-level language
• N – number of actual machine language
instructions needed to complete the execution
(note: loop)
• S – average number of basic steps needed to
execute one machine instruction. Each step
completes in one clock cycle
• R – clock rate
Q: Expand SPEC
ANS: Standard Performance Evaluation
Corporation
Q: Define Addressing modes?
ANS: The various addressing modes that are
defined in a given instruction set architecture
define how machine language instructions in
that architecture identify the operand(s) of
each instruction.
Q: A computer uses a memory unit with 256K
words of 32 bits each. A binary instruction
code is stored in one word of memory . The
instruction has four parts : an indirect bit , an
operation code , a register code part to specify
one of 64 registers, and an address part. Draw
the instruction word format and indicate the
number of bits in each.
ANS: Indirect 1bit , Opcode 5bits, Register 8bits,
Address 18bits
Q. A computer uses a instruction format that has
three parts: an indirect part, and operation code,
and an address part. One of the operand is AC
and is implicit. An other operand is specified in
the address part . An instruction at 021 has I=0,an
operation code of the AND instruction, and an
address part equal to 083 (all numbers are in
hexadecimal) contains the operand B8F2 and the
content of AC is A937.Go over the instruction
cycle and determine the contents of the following
registers at the end of the execute phase: PC , AR
, DR , AC , and IR.
PC , AR , DR , AC , and IR.
022,083,B8F2,A832,021
Q: A digital computer has a common bus system
for 16 registers of 32bits each . The bus is
constructed with multiplexers. How many
selection inputs are there in each multiplexer.
ANS: 4
Big endian and little endian format?
• Big-endian and little-endian are terms that describe the
order in which a sequence of bytes are stored in
computer memory.
• Big-endian is an order in which the "big end" (most
significant value in the sequence) is stored first (at the
lowest storage address).
• Little-endian is an order in which the "little end" (least
significant value in the sequence) is stored first.
• For example, in a big-endian computer, the two bytes
required for the hexadecimal number 4F52 would be
stored as 4F52 in storage (if 4F is stored at storage
address 1000, for example, 52 will be at address 1001).
In a little-endian system, it would be stored as 524F (52
at address 1000, 4F at 1001).