Ehsan Shams

Saeed Sharifi Tehrani

What is DSP ?

Digital Signal Processing (DSP) is used in a wide variety of

applications, and it is hard to find a good definition that is
general.

changing or analyzing information which is

measured as discrete sequences of numbers

TMS320C25 DSP
DSP Algorithm

Example : Digital Filters (e.g. Digital FIR Filters ,...)

Most share common features:

•They use a lot of maths (multiplying and adding signals)
•They deal with signals that come from the real world
•They require a response in a certain time

TMS320C25 DSP
Why DSP Processors?

A Comparison :

As shown ,DSP Processors are more efficient

TMS320C25 DSP
Why DSP Processors? (Contd.)

As in FIR Filters

TMS320C25 DSP
Texas Instruments,the company

designer and supplier of digital signal

processing and analog technologies

Six decades of history

TI envisions a world where every wireless call,

every phone call and every Internet connection is
touched by a Digital Signal Processor (DSP).

TMS320C25 DSP
History of the TMS320 family
TMS320C1x,
This family currently includes five generations of DSPs. TMS320C2x,
TMS320C3x,
TMS320C25, a CMOS 40-MHz digital signal processor TMS320C4x,
capable of twice the performance of the TMS320C1x and
TMS320C5x
devices

is capable of executing 10 million instructions per second.

24 additional instructions (133 total)
eight auxiliary registers
an eight-level hardware stack
4K words of on-chip program ROM
low power dissipation inherent to CMOS

TMS320C25 DSP
Architectural overview

Harvard architecture
On-chip memory
ALU
Multiplier

Memory interface
Serial ports
Multiprocessing applications

Direct Memory Access

TMS320C25 DSP
TMS320C25 Functional Block Diagram

TMS320C25 DSP
 Memory Organization
Total of 544 16-bit words of
on-chip data RAM,

Program and Data Memory

288 words are always data

memory and the remaining
256 words may
be configured as either
program or data memory.

The TMS320C2x can

address a total of 64K
words of data memory.

TMS320C25 DSP
Memory Organization (Cntd.)
spaces are
distinguished
externally by
means of the PS,
DS, and IS

The on-chip
program ROM
can be mapped
into the lower
4K words of
program
memory. This
ROM is
enabled when
Three separate address spaces for program memory, MP/MC is set
data memory, and I/O to a logic low.

TMS320C25 DSP
 Memory Organization (Auxiliary Registers)
register file containing eight auxiliary registers (AR0–AR7).

ARAU is useful
for address
manipulation

it may also serve

as an additional
general-purpose
arithmetic unit

TMS320C25 DSP
 Memory Organization (Memory Addressing Modes)
In the direct addressing When an immediate operand is used, it is contained
mode, the 9-bit data memory either within the instruction word itself or in the word
page pointer (DP) points to following the instruction opcode .
one of 512 pages, each page
consisting of 128 words.

In the indirect
addressing mode,
the currently
selected 16-bit
auxiliary register
AR(ARP)
addresses the data
memory through
the auxiliary
register file
bus(AFB).

TMS320C25 DSP
 CALU

A typical ALU instruction: Scaling Shifter

1) Data is fetched from the RAM on the data bus,
2) Data is passed through the scaling shifter and the ALU
ALU and accumulator
3) The result is moved into the accumulator.

Multiplier;T and P registers

TMS320C25 DSP
System Control

16-bit program counter

(PC)

hardware stack of
eight locations

TMS320C25 DSP
System Control (pipeline operations)

the prefetch counter

(PFC)

the 16-bit microcall

stack (MCS) register,

the instruction
register (IR),
Two status registers, ST0
the queue instruction and ST1, contain the status
register (QIR). of various conditions
and modes.

TMS320C25 DSP
System Control (Timer Operation+Repeat Counter)

The TMS320C2x
provides a memory-
mapped 16-bit timer
(TIM) register and
a 16-bit period (PRD)
register.

The on-chip timer is

a down counter that is
continuously clocked
The repeat counter (RPTC) is an 8-bit
by CLKOUT1.
counter.It can be loaded with a number
from 0 to 255 .
RPTC is cleared by reset.

TMS320C25 DSP
External Memory and IO Interface

A 16-bit parallel data bus (D15–D0),

A 16-bit address bus (A15–A0),
Data, program, and I/O space select (DS, PS, and IS) signals, and
Various system control signals.

1) Program Internal RAM/Data Internal (PI/DI)

2) Program Internal RAM/Data External (PI/DE)
3) Program External/Data Internal (PE/DI)
4) Program External/Data External (PE/DE)
5) Program Internal ROM/Data Internal (PR/DI)
6) Program Internal ROM/Data External (PR/DE)

TMS320C25 DSP
Interrupts

three external maskable user interrupts (INT2–INT0),

Internal interrupts are generated by the serial port (RINT and XINT), by
the timer (TINT), and by the software interrupt (TRAP) instruction.

The TMS320C2x has a built-in mechanism for

protecting multicycle instructions
from interrupts.

TMS320C25 DSP
Serial Ports

If the serial port

is not being
used, the DXR
and DRR
registers can be
used
as general-
purpose
registers.

A full-duplex on-chip serial port provides direct communication

with serial devices such as codecs, serial A/D converters, and
other serial systems.
TMS320C25 DSP
Direct Memory Access

The
In flexibility of theenvironment,
a multiprocessor TMS320C2x allows configurations
the SYNC input can beto satisfy
a wide
used torange
greatlyofease
system requirements:
interface between processors.

A standalone
For system applications,
multiprocessing (single processor),
the TMS320C2xs allocates
global data memory space and communicates with that space
A multiprocessor
via with devices
the BR (bus request) in parallel,
and READY control signals.

A host/slave multiprocessor with shared global data memory space

A peripheral processor

TMS320C25 DSP