Synchronous and Asynchronous protocols

Synchronous communication - Data is transmission and receiving is a continuous stream at

a constant rate. Synchronous communication requires the clock of transmitting device and
receiving device synchronized.
Examples of synchronous communication are: I2C, SPI
Asynchronous communication - The transmission of data requires no clock signal and
data transfer occurs intermittently rather than steady stream.
Examples of asynchronous Communication are UART, CAN
TM4C123 supports UART, CAN, SPI, I2C and USB protocols.
Duplex transmission is one in which data can be transmitted as well as received.
Simplex transmission, device is configured as transmitter or receiver (Printer).
Half duplex - Data is transmitted one way at a time.
Full duplex - Data transfer occurs both ways at the same time.
 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
Data Frame in UART

Start bit is always logic “0‟ (low)

Stop bit is logic “1‟ (high).

Data transfer rate - measured in terms of bits per second (bps) called as BAUD
 RS - 232
• DCD (Data carrier Detect) - to inform PC that a valid carrier has been
detected and connection is successfully established.
• DTR (Data Terminal Ready) - After self-test operation, DTR signal will
inform microcontroller that it is ready for communication.
• DSR (Data Set Ready) - When microcontroller is turned on, it will undergo
self-test for UART and asserts DSR to signal PC COM port, that it is ready.
• RTS (Request To Send) - When a PC COM port want to transmit the byte of
data to microcontroller, it will signal the microcontroller by asserting the
RTS signal.
• CTS (Clear To Send) - Microcontroller will respond to RTS signal by
asserting the CTS line, indicating that it is ready to receive data.
• RI (Ring Indicator) - Microcontroller can send RI to PC, so that there will be
telephone ringing and PC will receive it.
UART Functional Diagram
UART Functional Diagram
 UART
Each UART module can be configured and controlled by four groups of
registers:
• Clock Control registers and Baud Rate Generation registers
• Control/Status registers
• Interrupt Control and DMA Control registers
• Identification registers
Clock Control registers and Baud Rate Generation registers
• UART Clock Configuration (UARTCC) Register: Configure UART clock
source.
• UART Control (UARTCTL) Register: Control the operations of UART.
• UART Integer Baud Rate Divisor (UARTIBRD) Register: Provide
integer divider.
• UART Fractional Baud Rate Divisor (UARTFBRD) Register: Provide
fraction divider.
 Control/Status Register Group
• UART Control (UARTCTL) Register: Control the operations of UART.
• UART Line Control Register (UARTLCHR): Setup data framing parameters.
• UART Data Register (UARTDR): Provide a temporary data storage for FIFO.
• UART Receive Status/Error Clear Register (UARTRSR/UARTECR): Provide data receive
status and clear data framing, break, and overrun errors.
• UART Flag Register (UARTFR): Provide UART working status.
• UART IrDA Low-Power Register (UARTILPR): Store the 8-bit low-power counter divisor
value.
• UART9-Bit Self Address Register (UART9BITADDR): This register is used in conjunction
with UART9BITAMASK to form a match for address-byte received.
• UART 9-Bit Self Address Mask (UART9BITAMASK): Enable the address mask for 9-bit
mode.
• UARTPeripheral Properties (UARTPP) Register: Provide information to indicate whether
to support 9-bit operation or smart card operation.
• Transmit FIFO (TXFIFO): Store 16 × 8-bit data to be transmitted.
• Receive FIFO (RXFIFO): Store 16 × 12-bit data to be received.
 Interrupt Control and DMA Control Register Group:
• UART Interrupt FIFO Level Select (UARTIFLS) Register: Select the interrupt
triggering level based on the FIFO data storage level.
• UART Raw Interrupt Status (UARTRIS) Register: Provide the raw interrupt
status.
• UART Interrupt Mask (UARTIM) Register: Control whether the UARTRIS
can be sent to the interrupt controller or not.
• UART Masked Interrupt Status (UARTMIS) Register: Provide the current
masked interrupt status.
• UART Interrupt Clear Register (UARTICR): Clear any interrupt.
• UART DMA Control (UARTDMACTL) Register: Control the DMA operations.
• UART Identification Register Group: 12 registers are included in this group
to provide software identification functions for each UART module.
 UART API FUNCTIONS
The clock source for the baud rate • Sending and receiving data via the UART
generator is handled by can be handled by
• UARTClockSourceSet() • UARTCharPut() and UARTCharGet()
• UARTClockSourceGet() • UARTCharPutNonBlocking()
• UARTCharGetNonBlocking()
Configuring and control the UART can • UARTCharsAvail()
be handled by • UARTSpaceAvail()
• UARTConfigSetExpClk() • UARTBreakCtl()
• UARTEnable() Managing the UART interrupts
• UARTDisable() • UARTIntRegister()
• UARTParityModeSet() • UARTIntUnregister()
• UARTDMAEnable() • UARTIntEnable()
• UARTDMADisable() • UARTIntDisable()
• UARTIntStatus()
• UARTIntClear()
• UARTFIFOLevelSet()