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PROCESSOR CONTROLLED TEST

DEVELOPMENT: A CASE STUDY


WITH AN INTEL I7 PROCESSOR
BOARD
Authors-Nur Baki Er, Ali Aydoğan,Hayrettin Kesim

Presented by- Yadnesh Dhanawade(Roll no-7864)


Aniket Masalkhamb(Roll no- 8082)
OUTLINE

1. INTRODUCTION

2. PROBLEM STATEMENT

3. PROPOSED METHODOLOGY

4. RESULTS

5. CONCLUSIONS AND FUTURE WORK

6. REFRENCES
INTRODUCTION

ASELSAN A.Ş., (Turkish: ASELSAN, acronym: Askeri Elektronik Sanayi, Military Electronic
Industries) is a Turkish corporation that produces tactical military radios and defense electronic
systems for the Turkish Armed Forces. ASELSAN developed a new processor board based on intel
i7 core to meet its project requirements and military standards. To test the board another company
named ASSETS developed a hardware and software packages.
PROBLEM STATEMENT

Design a functional test for the Intel i7 Processor Board devloped by ASELSAN. It should
enable user to ensure that all of the functional blocks like processor, memory chips, video and
communication interfaces and data lines work as expected and meet the requirements of the
design.
Processor Controlled Test

 Remote Instrumentation Control Device(Hardware)


 POD2(Hardware)
 ScanWorks(Software)
HARDWARE PACKAGES
RIC is a compact, efficient and multi-directional Ethernet switch. It supports 10/100/1000 Mbps CAT5e/6 Ethernet interface. It
has a programmable voltage level and test clock. POD2 is a device to setup the electrical interface with the processor. By
modifying the options in the ScanWorks software, POD2 enables the user to apply right voltage to the processor. The voltage
regulation options menu can be seen in figure below. RIC is connected to the test computer via Ethernet interface and via local
area network it communicates with POD 2.
SOFTWARE INTERFACE
The scanworks software has three modes – Interactive, developer and operator mode. In Interactive mode menu, all the test
related to processor and its interfaces can be applied manually by the user. He can read/write the registers, monitor all the
device connected via PCIe interface, etc. These tests don’t require any TCL script to be written. The developer generate custom
test functions for the UUT. The operator mode is used by test operator to run developed test functions. These test functions are
written in TCL Language. The below given figure shows the three modes.
APPLICATION OF PCT TO PROCESOR BOARD
The test setup used in this study is shown in given figure. Setup is consist of a processor board ( Intel i7 processor, 4GB
ram), PCT hardware, cables, USB sticks, power source, SSD hard disk and a test computer on which ScanWorks software
runs. The Auto-Test generation mode of the developer mode is used. The user has to enter Highest PCI Bus, Highest Device,
Highest Function, PCI Configuration parameters, Index Port and Data Port. The function generates the architecture map of
the board by showing all the devices connected to processor via PCIe interface.
TESTS PERFORMED

 USB Tests
 Ethernet Tests(via loopback connector)
 Serial Channel Communication Tests (via loopback connector)
 PCIe Interface Tests(x16 width and x4 width)
 Memory Block Tests (RAM)
MEMORY BLOCK TEST (RAM)

One of the most important advancement gained by PCT was the ability to test memory blocks of the processor board. There
were lots of trouble because of the RAM chips. With the memory test generated by PCT, it is possible to read and write all the
registers in the RAM chips. Hence when an error ccurred, it was possible to localize the error and create low cost solution.
CONCLUSION
The aim of this study is to develop a new and alternative functional test method for the custom processor boards designed
and produced in ASELSAN. PCT is an alternative functional test method for the processor boards8 serial channels can be
tested automatically via loopback connectors with PCT for 3 different protocols namely RS232, RS422 and RS485. Before
PCT, the test technician was using different cable set for these different protocols. That results in slow test steps and cost of
producing and maintaining those cable sets. With automatization of the test steps and test results page, the user error is
minimized. One of the most important advancement coming with PCT is to be able to test RAM blocks and localize the
defects.
REFRENCES

1. Intel Debug Port Design Guide


2. www.asset-intertech.com

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