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Principles
Instruction Sets
• What’s an instruction set?
– Set of all instructions understood by the CPU
– Each instruction directly executed in hardware
• Instruction Set Representation
– Sequence of bits, typically 1-4 words
– May be variable length or fixed length
– Some bits represent the op code, others
represent the operand
Instruction Set Architecture (ISA)
•Instruction Execution Cycle
0.25
% of 0.2
Displacement
0.15 Int
FP
0.1
0.05
0
0 2 4 6 8 10 12 14
0.5
% 0.4
0.3 GCC
Tex
0.2
0.1
0
0 4 8 12 16 20 24 28 32
Conditional
Jump
Integer Call/Return
Floating Point
0 20 40 60 80 100
Branch Address Specification
• Effective address of the branch target is known at
compile time for both conditional and
unconditional branches
– as a register containing the target address
– as a PC- relative offset
• Consider word length addresses, registers, and
instructions
– full address desired? Then pick the register option.
– BUT - Setup and effective address will take longer.
– if you can deal with smaller offset then PC relative
works
– PC relative is also position independent - so simple
linker duty, preferred when possible
Branch Distances
0.35
0.3
0.25
% 0.2
Float
0.15 Int
0.1
0.05
0
0 1 2 3 4 5 6 7 8 9 10 11 12
Everything 81%