Assembler Design

Role of Assembler

Source Object
Assembler Linker
Program Code

Executable
Code

Loader
 Elements of Assembly Language
 Format of Statement
[label] <opcode> <operand>[,..<operand>..]

Label – symbolic name associated with

memory word.
Opcode – m/c instruction or assembler
directive or declaration.
Operand – First operand (Register)
Second operand(Memory
Word)
<symbolic name> [+<displacement>]
[<Index Register>]

AREA
AREA + 5
AREA(4)
Types of Assembly Statements
 IMPERATIVE STATEMENTS
 DECLARATION STATEMENTS
 ASSEMBLER DIRECTIVES
Imperative Statements
 Memory Reference/ Transfer Control
 Arithmetic
 Logical
 Flow Control
Imperative Statements
STOP 00 READ 09
ADD 01 PRINT 10
SUB 02
MULT 03
MOVER 04
MOVEM 05
COMP 06
BC 07
DIV 08
EXAMPLES :
 MOVER BREG , ONE
 MOVEM BREG, TERM
 NEXT MULT CREG,TERM
 COMP CREG, N
 BC LE, NEXT
DECLARATION STATEMENTS
 DS – Reserves storage space
 DC – Declares constant & reserves memory
 Formats
DS: [label] DS <constant>
e.g. A DS 1
A DS 10
DC: [label] DC ‘<value>’
e.g. T DC ‘5’
Literals vs. DC vs. Immediate Operands
Literals Constants Immediate
Operands
ADD AREG, ‘=5’ ADD AREG,FIVE ADD AREG, 5
……..
……..
FIVE DC ‘5’

Value can’t be Value can be

changed changed
No architectural Architectural
provision is provision is
needed needed
Assembler Directive Statements
 Instructs Assembler
 No m/c equivalent is generated
 START, END, ORIGIN, LTORG, EQU

START
Syntax: START <constant>
e.g. START 200
END
Syntax: END [<operand spec>]
e.g. END
END 205

ADVANCED ASSEMBLER DIRECTIVES

ORIGIN
Syntax: ORIGIN < address spec>
<address spec> - constant or operand
Set the value of LC to address
EQU
Syntax: <symbol> EQU <Address Spec>

LTORG
 Assigns memory locations to various literals.

 Literal Pool

 BY default assembler places literals after the

END statement.
????
 START 100
 L1 MOVER AREG, =’6’
 BC LE, NEXT
 ORIGIN L2
 C DC ‘5’
 N DS 1
 END L2
Language Processor
 Analysis Phase
 Synthesis Phase

ASSEMBLER:
 General Design Specification

 Phases

 Data Structures

 Translation Schemes
 General Design Specifications
 Specify the Problem & identify
information
 Specify data structures

 Define the format of the data structures

required
 Specify the algorithm to be used
Translation Scheme
 Single Pass Translation
 Two Pass Translation

 Single Pass Assembler

 Two Pass Assembler
Two Pass Assembler
PASS 1
 Isolate label, mnemonic opcodes, operands
 Uses OPTAB
 Symbol Table
 Literal Table
 Location Counter Processing
 Construct IC
PASS II
 Uses OPTAB, SYMTAB, LITTAB
 Generate machine instructions of the
statements.
 LITTAB OPTAB

Source program Pass 1 IR Pass 2 Object program

LC SYMTAB
Data Structures Used
 Symbol Table (SYMTAB)
 Literal Table (LITTAB)
 Operation Code Table (OPTAB,POT,MOT)
 Location Counter (LC)
 Pool table (POOLTAB)
OPTAB
Mnemonic Class Mnemonic Info
Opcode
MOVER IS (04,1)

DS DL R#7

START AD R#1
Symbol Table (SYMTAB)
SYMBOL LOCATION LENGTH

A 101 3
L1 104 1
Literal Table ( LITTAB)
Literal Address

1 =‘6’

2 =‘1’
POOLTAB

LITERAL NO.

#1
#2
FLOW CHART & ALGORITHM
PASS - I