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Ethernet I A A I
SONET Ethernet
Switch W D D W
RING Switch
F M M F
But Ethernet
comes in bursty “frames” (packets)
While SONET/SDH
is constant bit rate
Ethernet
64 – 1518 B
DA (6B) SA (6B) T/L (2B) data (0-1500B) pad (0-46) FCS (4B)
68 – 1522 B
DA(6B) SA(6B) VT(2B) VLAN(2B) T/L(2B) data (0-1500B) pad(0-46) FCS(4B)
HDLC
Notes:
bit stream length is no longer necessarily divisible by 8
bit stream length is not a priori predictable
worst case expansion is 20%
encoding/decoding is easy in HW, hard in SW
Notes:
bit stream remains byte oriented
length expansion is typically about 1%, but can range from 0 to 100% !
(there is also a consistent overhead algorithm – but not in use)
encoding/decoding is easy in SW
Y(J)S EoS Slide 19
HDLC framing
HDLC frame is bounded by flags, and has a particular structure
flag (8) address (0/8/16) ctrl (8/16) data FCS (16/32) flag (8)
Many variants (SDLC, ISO, LAPB, LAPD, LAPF, LAPS, SS7, PPP-HDLC, Cisco-HDLC, etc)
Address:
There may be no address (e.g. SS7 HDLC)
SDLC always had 8 bit addresses
ISO 3309 HDLC has structured multibyte address
SAPI C/R EA EA
– Service Access Point Identifier (MSB of SAPI =1 may indicate broadcast/multicast)
– EA=1 means 8 bit, EA=0 means extended address
– C/R=1 for commands, C/R=0 for responses
The single byte hex FF is recognized as the broadcast address
PPP
PPP frame
flag address ctrl protocol information padding FCS flag
1662
7E FF 03 (8/16b) (optional) (16/32b) 7E
SONET/SDH
Note:
For more information – see SONET/SDH course.
path
line line line
section section section section
…
9 rows
section + line
overhead Section overhead is 3 rows * 3 columns = 9 bytes = 576 kbps
framing, performance monitoring, management
Line overhead is 6 rows * 3 columns = 18 bytes = 1152 kbps
protection switching, line maintenance, mux/concat, SPE pointer
SPE is 9 rows * 87 columns = 783 bytes = 50.112 Mbps
Similarly, STM-1 has 9 (different) columns of section+line overhead !
Y(J)S EoS Slide 34
STM-1 frame structure
270 columns
Transport
Overhead
TOH
Similarly, STM-1 has 9 (different) columns of transport overhead !
RS overhead is 3 rows * 9 columns
Pointer overhead is 1 row * 9 columns
MS overhead is 5 rows * 9 columns
SPE is 9 rows * 87 columns
Y(J)S EoS Slide 35
Scrambling
SONET/SDH receivers recover clock based on incoming signal
Insufficient number of 0-1 transitions causes degradation of clock performance
run continuously on ATM payload bytes (suspended for 5 bytes of cell tax)
Z-43
Y(J)S EoS Slide 36
HOP SPE structure
2 bytes in the line overhead point to the STS path overhead POH
pointer (floating) allows frequency/phase compensation
(after re-arranging) POH is one column of 9 rows (9 bytes = 576 kbps)
00 unequipped
J1 POH is responsible for
– path performance monitoring 01 nonspecific
B3
– status (including of mapped payloads)
C2 02 LOP (TUG)
– trace
G1 04 E3/T3
F2 2 bytes are of particular interest to us: 12 E4
H4 C2 is the “signal label” 13 ATM
F3 indicates path payload type 16 PoS – RFC 1662
K3
H4 is the “multiframe indication” 18 LAPS X.85
N1 used by VCAT/LCAS (discussed later) 1A 10G Ethernet
POH
1B GFP
CF PoS - RFC1619
Similarly
VT2/VC-12 has 4 columns = 36 bytes = 2.304 Mbps
but 2 bytes are used for overhead
So actually only 34 bytes = 2.176 Mbps are available
Virtual Concatenation
…
9 rows
270 columns
…
9 rows
9 columns of 1 column of
260 columns of SPE
H4
1st
frame
of
4 E1s
TS0
each E1 time
frames
of an
E1 …
TS0
For HOS SDH VCAT and PDH VCAT (H4 byte or PDH VCAT overhead)
The basic multiframe is 16 frames
So we need 256 multiframes in a superframe (256*16=4096)
The MultiFrame Indicator is divided into two parts:
MFI1 (4 bits) appears once per frame
– and counts from 0 to 15 to sequence the multiframe
MFI2 (8bits) appears once per multiframe
– and counts from 0 to 255
16 frame multiframe
0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 1
CRC-8 bits 1-4 0 1 1 0
CRC-8 bits 5-8 0 1 1 1
MST bits 1 0 0 0
more MST bits 1 0 0 1
0 0 0 RS-ACK 1 0 1 0
reserved fields
0 0 0 0 1 0 1 1
0 0 0 0 1 1 0 0
0 0 0 0 1 1 0 1
SQ bits 1-4 1 1 1 0
SQ bits 5-8 1 1 1 1
Y(J)S EoS Slide 61
H4 format – some comments
CRC-8 (when using K4 it is CRC-3)
– covers the previous 14 frames (not sync’ed on multiframe)
– polynomial x8 + x2 + x + 1
MST
– each VCG member carries the status of all members
– so we need 256 bits of member status
– this is done by muxing MST bits
– there are MST bits per multiframe
– and 32 multiframes in an MST multiframe
– no special sequencing, just MFI2 multiframe mod 32
GID
– single bit - cycles through 215-1 LFSR sequence
Y(J)S EoS Slide 62
VLI format
MFI1
MFI2 bits 1-4 0 0 0 0
MFI2 bits 5-8 0 0 0 1
CTRL 0 0 1 0
0 0 0 GID 0 0 1 1
reserved fields
16 frame multiframe
0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 1
CRC-8 bits 1-4 0 1 1 0
CRC-8 bits 5-8 0 1 1 1
MST bits 1 0 0 0
more MST bits 1 0 0 1
0 0 0 RS-ACK 1 0 1 0
reserved fields
0 0 0 0 1 0 1 1
0 0 0 0 1 1 0 0
0 0 0 0 1 1 0 1
0 0 0 0 1 1 1 0
SQ 1 1 1 1
Y(J)S EoS Slide 63
LCAS – adding a member (1)
When more/less BW is needed, we need to add/remove VCAT members
Adding/removing VCAT members first requires provisioning (management)
LCAS handles member sequence numbers assignment
LCAS ensures service is not disrupted
Example: to add a 4th member to group “1”
GID=g SQ=1 CTRL=NORM
Initial state: GID=g SQ=2 CTRL=NORM
GID=g SQ=3 CTRL=EOS
Ethernet Ethernet
IP
PoS is BW efficient
but POS has its disadvantages
BW must be predetermined
HDLC BW expansion and nondeterminacy
BW allocation is tightly constrained by SONET/SDH capacities
– e.g. GbE requires a full OC-48 pipe
POS requires removing the Ethernet headers
– So lose RPR, VLAN, 802.1p, multicasting, etc
POS requires IP routers
IP IP IP
X.86 LLC LLC LLC
MAC MAC MAC
LAPS
SDH
LAPS
rate adaptation
SDH
8B/10B line code maps each of the 256 values of the 8-bit input
into 1 or 2 different 10 bit words
Maintains a running 0-1 balance and when encoding an input with 2 possibilities, it
chooses the one that improves the balance
spare 10b symbols are used as control codes (e.g. start/end of frame)
Were we to use GFP-F would lose control info, GFP-T is transparent to these codes
Also, GFP-T needn’t wait for entire PDU to be received (adding delay!)
GFP-T maps 8B/10B line code into 64B/65B block code
Copper technologies
point to point copper @ 10 Mbps 750 m (short reach PHY)
– VDSL 10PASS-TS
point to point copper @ 2 Mbps 2.7 km (long reach PHY)
– SHDSL.bis 2Base-TL
– up to 45 Mbps by bonding
OAM
Y(J)S EoS Slide 90
WAN-PHY (10 GbE in STM-64)
10GBASE-W 802.3-2005 Clause 50 G.707 Annex F
There is a special case where Ethernet and SDH bit-rates are close
STM-64 is 9953.28Mbps
GbE 10GBASE-R (64B/66B coding) can be directly mapped
into a STM-64 (with contiguous concatenation) without need for GFP
MAC creates "stretched InterPacket Gap" to compensate for rate being < 10G
This is the fastest connection commonly used for Internet traffic
Complication: SDH clock accuracy is ± 4.6 ppm, GbE accuracy is ± 20 ppm
64*(270-9) = 16704
columns
J1