EXPERT SYSTEMS AND SOLUTIONS

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8.2 PWM CONVERTER FED D.C DRIVE Block diagram of DPWM converter fed D.C drive using minimum hardware is shown in fig 8.1. This circuit has minimum hardware since it uses single transistor. The PWM pulses are generated using a high frequency DPWM controller IC. The pulses from high frequency DPWM controller IC cannot drive the transistor directly. These pulses are amplified using a driver circuit. The amplified pulses are given to he base of power transistor. The DPWM converter converts fixed A.C in to Variable D.C. This variable D.C voltage is given to the D.C motor. Varying the width of the pulses varies the speed of the D.C motor.

FIG 8.2. PWM CONVERTER FED DC DRIVE CIRCUIT

8.3. BASE DRIVE CIRCUIT The pulses from the high frequency DPWM controller IC are given to the optocoupler through the buffer 74244.The clock to PAL22VT10 IC is given through 555 TIMER This buffer provides protection for high frequency DPWM controller IC. The 68-ohm resistance in the input side of optocoupler reduces current drawn by optocoupler. The opto coupler provides isolation between power circuit and control circuit. When a pulse is applied to the input of MCT2E, the LED conducts. Light falls on the base of transistor and the transistor conducts. When the transistor in the opto coupler conducts, the input voltage to the transistor T2 is made zero. T2 does not conduct and the output of T2 is high. When the input to the MCT2E is low, the diode does not conduct. The potentiometer does not conduct. The input to the transistor T2 is made high. Transistor T2 conducts and the output is low. Thus the output f driver circuit is in phase with input.

FIG 8.3 BASE DRIVE CIRCUIT

8.4. POWER SUPPLY CIRCUIT 8.4.1 5 V POWER SUPPLY The power supply used for driver circuit is shown in fig 8.4 is given to PAL22V10 IC, BUFFER & TIMER. The 230 V ac supply is stepped down to 6v using 230 V / 6 v transformer. The low voltage a.c is rectified using a diode rectifier. The output of rectifier is filtered using 1000-microfarad electrolyte capacitor filter. This unregulated D.C is given to the voltage regulator 7805. The output of 7805 is given to another filter capacitor 1 microfarad to reduce the ripple. A bleeder resistor is connected in parallel with capacitor. This provides a path for the capacitor to discharge. FIG 8.4 POWER SUPPLY (+5V

8.4.2 12 V POWER SUPPLY The power supply used for driver circuit is shown in fig 8.5 is given to optocoupler. The 230 V ac supply is stepped down to 15v using 230 V / 15 v transformer. The low voltage a.c is rectified using a diode rectifier. The output of rectifier is filtered using 1000-microfarad electrolyte capacitor filter. This unregulated D.C is given to the voltage regulator 7812. The output of 7805 is given to another filter capacitor 1 microfarad to reduce the ripple. A bleeder resistor is connected in parallel with capacitor. This provides a path for the capacitor to discharge. FIG 8.5 POWER SUPPLY (+12V)

REFERENCE CLOCK

SYSTEM CLOCK

RING COUNTER
Q0 Q1 Q2 Q3

2-bit counter Out

0 nd

1 2 3 4:1 MUX

nc bit
Comparator

1 Out

d nc

R nc bit Comparator 2 S OUT

nc

00H