DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADHESH

Name : K. Padmavathi
Designation : Lecturer
Branch : E.C.E
Institute : Government Polytechnic for
women Kakinada
Year/Semester : III Semester
Subject : Digital Electronics
Subject Code : CM-305

Topic : Logic Families

Duration : 50 Minutes
Sub Topic : Tri State Buffer
Teaching Aids : Tabular forms, diagrams
CM-305.28 1
OBJECTIVES

• On completion of this period, you would

be
able to
• Know the need for a tri state buffer

• Know Principle of a tri state buffer

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 Recap
• ECL gates
• Comparison of ECL gates over TTL and CMOS
gates

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NEED FOR A TRI-STATE BUFFER

• In normal logic circuits, there are only two stable

states

of the output LOW & HIGH

• In complex digital systems, a number of gate

outputs may be connected to a common bus.

• This common bus may be connected to drive a

number of gate inputs.

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• When a number of gate outputs are connected to the

bus, the following difficulties may encountered.

1. Totem pole outputs cannot be connected together

because of very large current drain from the supply

Large current drain results heating of the IC’s

which may get damaged.

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2. Open collector outputs cannot be connected

together with a common collector resistor

connected

externally.
This causes the problems of loading and speed of
operation.

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• To overcome these difficulties, a tri-state logic is

developed.

• A tri-state logic consists of three states

1. HIGH

2. LOW

3. HIGH IMPEDANCE (OR) FLOATING STATE

• High state impedance state allows a direct wire

connection of many outputs to a common line called BUS.

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Fig 2.6 LOGIC SYMBOL OF A TRI-STATE BUFFER

DATA INPUT DATA OUTPUT

ENABLE (OR) CONTROL

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Table 2.9 TRUTH TABLE OF A TRI-STATE BUFFER

INPUT CONTROL OUTPUT

0 0 High-
Impedance
1 0 High-
Impedance
0 1 0
1 1 1

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 • When the control input is low, the output is an open

circuit, which gives a high impedance regardless of the

value of data input

• When the control input is high, the gate is enabled

and behaves like a normal buffer with output equal to

input binary value.

• Like tri-state buffer, there are tri-state inverters also

designed.
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Quiz

• The output states of tristates logic are,

(c) Logic 1

(e) Logic 0

(g) High impedance

(i) All of the above

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SUMMARY

• In normal logic circuits, there are only two stable states of

the output LOW & HIGH

• A tri-state logic consists of three states

1. HIGH

2. LOW

3. HIGH IMPEDANCE (OR) FLOATING STATE

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Questions

• State the need for a tri-state buffer

• Draw the circuit symbol of a tri-state buffer and explain its

working

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