DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH

Name : D.RAVI KUMAR

Designation : Lecturer in ECE

Branch : Electronics & Communication Engg.

Institute : Andhra polytechnic
Year/Semester : III Semester
Subject : Digital Electronics
Subject code : CM-305
Topic : Counters & Registers (4/20)
Sub Topic : Logic diagram of Decade ripple counter
Duration : 50min.
Teaching aids : PPT & Animations
CM305.44 1
Objectives

On completion of this period ,you would be able to

• Draw the asynchronous decade counter using

asynchronous inputs.

• Draw the asynchronous counter of any modulus with or

without using asynchronous inputs.

CM305.44 2
 Recap
• Circuit diagram and working of Modulo-8 ripple counter
• What are the synchronous inputs?

• The inputs which affect the output only on the application of

triggering edge of the clock pulse are called synchronous
inputs.

• Inputs to the Flip-Flops S-R, J-K, D, and T are called

synchronous inputs.

CM305.44 4
• What are the asynchronous inputs?

• The inputs that affect the state of the flip-flop

independent of the clock pulse are known as
asynchronous inputs.

• These inputs are normally labeled as ‘preset’ (PRE), and

‘clear’ (CLR). These are also called ‘direct set’ and ‘direct
reset’ inputs.

CM305.44 5
J-K Flip-flop with asynchronous inputs

with active low inputs with active high inputs

CM305.44 6
About asynchronous inputs

• An active level on the preset input will SET the flip-flop

irrespective of the J,K and clock inputs.

• An active level on the clear input will RESET the flip-flop

irrespective of the J,K and clock inputs.

• For an active low flip-flop a 0 on PRE input sets and a 0 on

CLR input resets the flip-flop irrespective of the J,K and
clock inputs.

CM305.44 7
About asynchronous inputs

• These asynchronous inputs may be applied at any time

between clock pulses and are not in synchronism with
the clock.

• These PRE and CLR inputs must be kept HIGH for

synchronous operation.

• Active asynchronous inputs override the synchronous

inputs.

CM305.44 8
State diagram of mod – 10 counter

CM305.44 9
Design of mod-10 counter

• MOD- 10 counter can be designed either by using

asynchronous inputs or without using asynchronous inputs.

• The design is quite simple by using asynchronous inputs.

• It is some what difficult to design any counter of modulus

less than 2n without using asynchronous inputs.

• To design the MOD-10 ripple counter without asynchronous

inputs the designer has to know the timing diagram first.

CM305.44 10
Mod-10 ripple counter using asynchronous inputs

CM305.44 11
Mod-10 ripple counter without using
asynchronous inputs

CM305.44 12
Summary

• A decade counter is constructed by using 4 flip-flops.

• A decade counter is a modified mod-16 counter.

• A decade counter divides the input frequency by 10 and

it is known as divide by 10 counter.

• The output of decade counter resets to ‘0000’ when its

count reaches ‘1010’

CM305.44 13
Quiz

1. Pick the set of asynchronous inputs of a counter

a. S-R

b. D

c. J-K

d. CLR-PRE

CM305.44 14
2. Pick the of synchronous inputs of a counter

d. PRE

b. CLR

c. CLR

d. T

CM305.44 15
Frequently asked questions

1. Draw logic diagram of MOD-10 ripple counter with the

help of asynchronous inputs.

3. Draw the logic diagram of MOD-10 ripple counter

without using asynchronous inputs.

5. Distinguish between synchronous and asynchronous

inputs.

CM305.44 16