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Unit-1
Fetching & execution of instructions Instruction address from PC PC to MAR Using control signals MAR -> Memory ->MDR -If instruction MDR -> IR - If data MDR -> register Execute instruction
INTERRUPTS
Interrupt is a request from an I/O device for service by the processor Interrupt service routine Example - ctrl,alt & del
Single-bus structure
Input Output Memory Processor
Receiving and interpreting user commands Entering and editing application programs File management Application program management Controlling I/O units Program Translation Linking & Running
PERFORMANCE
"Elapsed Time" - Total time required to execute the program "Processor Time" - Sum of the periods during which the processor is active
PROCESSOR CLOCK
"clock" - Timing signal that controls the processor circuits "clock cyles" - Regular time intervals defined by clock R=1/P Where
R -> clock rate P -> length of a clock cycle Hertz - cycles per second
T=N*S/R
T -> processor time required to execute a program N -> number of machine language instructions S -> average number of basic steps needed to execute one machine instruction R -> clock rate N * S -> total number of clock cycles needed to execute a program
PIPELINING
Overlapping the execution of successive instructions Example - ADD R1, R2, R3
SUPERSCALAR OPERATION
pipelines
Improving IC technology Reducing the amount of processing done in one basic step
INSTRUCTION SETS
RISC - Reduced Instruction set computer CISC - Complex Instruction set computer
PERFORMANCE MEASUREMENT
MEMORY OPERATIONS
LOAD OPERATION
Memory contents remain unchanged
LOAD
ARITHMETIC UNIT
High speed adders Booth Algorithm High speed multipliers Circuits to perform division operations Representation of floating point numbers in IEEE format Arithmetic operations on floating point numbers
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Carry-out
Add/Subtract Rule Choose the number with the smaller exponent and shift its mantissa right a number of steps equal to the difference in exponents Set the exponent of the result equal to the larger exponent Perform addition/subtraction on the mantissas and determine the sign of the result Normalize the resulting value, if necessary
Multiply Rule Add the exponents and subtract 127. Multiply the mantissas and determine the sign of the result Normalize the resulting value, if necessary Divide Rule Subtract the exponents and add 127. Divide the mantissas and determine the sign of the result Normalize the resulting value, if necessary.
The other mantissa, MA, is sent directly sent to the mantissa adder/subtractor. If the sign is 1, then EA < EB and the mantissas are swapped before they are sent to the SHIFTER. Step 2 Two-way multiplexer, MUX The exponent of the result, E, is tentatively determined as EA if EA EB, or EB if EA < EB, based on the sign of the difference resulting from comparing exponents in Step 1.
Step 3 - Mantissa adder/subtractor The CONTROL logic determines whether the mantissas are to be added or subtracted. The CONTROL logic also determines the sign of the result, SR. If A is negative, B is positive, and the operation is AB, then the mantissas are added and the sign of the result is ve. If A and B are both positive and the operation is A-B, then the mantissas are subtracted. The sign of the result, SR, now depends on the mantissa subtraction operation.