Introduction Block Diagram and Pin Description of the 8051 Registers Memory mapping in 8051 Stack in the 8051

I/O Port Programming Timer Interrupt

The microprocessor is the core of computer systems. Nowadays many communication, digital entertainment, portable devices, are controlled by them. A designer should know what types of components he needs, ways to reduce production costs and product reliable.

Hardware :Interface to the real world

Software :order how to deal with inputs

CPU: Central Processing Unit I/O: Input /Output Bus: Address bus & Data bus Memory: RAM & ROM Timer Interrupt Serial Port Parallel Port

General-purpose microprocessor

CPU for Computers No RAM, ROM, I/O on CPU chip itself ExampleIntels x86, Motorolas 680x0
Many chips on mothers board

CPU GeneralPurpose Microprocessor

Data Bus

RAM

ROM

I/O Port

Timer

Serial COM Port

Address Bus General-Purpose Microprocessor System

Microcontroller :

A smaller computer On-chip RAM, ROM, I/O ports... ExampleMotorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X

CPU

RAM ROM

A single chip
I/O Port
Serial Timer COM Port Microcontroller

Microprocessor vs. Microcontroller

Microcontroller Microprocessor CPU, RAM, ROM, I/O and CPU is stand-alone, timer are all on a single chip RAM, ROM, I/O, timer fix amount of on-chip ROM, are separate RAM, I/O ports designer can decide on for applications in which cost, the amount of ROM, power and space are critical RAM and I/O ports. expansive single-purpose versatility general-purpose

External interrupts Interrupt Control On-chip ROM for program code

Timer/Counter

On-chip RAM

Timer 1 Timer 0

Counter Inputs

CPU
Serial Port

OSC

Bus Control

4 I/O Ports

P0 P1 P2 P3

TxD RxD

Address/Data

Pin Description of the 8051

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

8051 (8031)

Vcc

10 K

P0.0 DS5000 P0.1 P0.2 8751 P0.3 P0.4 8951 P0.5 P0.6 P0.7

Port 0

Registers
A B R0 R1 R2 R3 R4 R5 R6 Some 8051 16-bit Register PC PC DPTR DPH DPL

R7 Some 8-bitt Registers of the 8051

7FH

The register used to access the stack is called SP (stack pointer) 30H register. 2FH The stack pointer in the20H 1FH 8051 is only 8 bits wide, 18H which means that it can 17H take value 00 to FFH. 10H 0FH When 8051 powered up, the SP register contains08H 07H value 07. 00H

Scratch pad RAM

Bit-Addressable RAM

Register Bank 3 Register Bank 2 (Stack) Register Bank 1 Register Bank 0

LOOP and JUMP Instructions

Conditional Jumps :
JZ
JNZ DJNZ

Jump if A=0
Jump if A/=0 Decrement and jump if A/=0

CJNE A,byte
CJNE reg,#data JC JNC JB JNB JBC

Jump if A/=byte
Jump if byte/=#data Jump if CY=1 Jump if CY=0 Jump if bit=1 Jump if bit=0 Jump if bit=1 and clear bit

Logic Required Conversion Time < 100ms Easy Interface to Most Microprocessors Will Operate in a Stand Alone Mode Differential Analog Voltage Inputs Works with Band gap Voltage References TTL Compatible Inputs and Outputs On-Chip Clock Generator 0V to 5V Analog Voltage Input Range (Single + 5V Supply) No Zero-Adjust Required

1. All voltages are measured with respect to GND, unless otherwise specified. The separate AGND point should always be wired to the DGND, being careful to avoid ground loops. 2. For VIN(-) VIN(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the V+ supply. Be careful, during testing at low V+ levels (4.5V), as high level analog inputs (5V) can cause this input diode to conduct - especially at elevated temperatures, and cause errors for analog inputs near full scale. As long as the analog VIN does not exceed the supply voltage by more than 50mV, the output code will be correct. To achieve an absolute 0V to 5V input voltage range will therefore require a minimum supply voltage of 4.950V over temperature variations, initial tolerance and loading.

3. With V+ = 6V, the digital logic interfaces are no longer TTL compatible. 4. With an asynchronous start pulse, up to 8 clock periods may be required before the internal clock phases are proper to start the conversion process. 5. The CS input is assumed to bracket the WR strobe input so that timing is dependent on the WR pulse width. An arbitrarily wide pulse width will hold the converter in a reset mode and the start of conversion is initiated by the low to high transition of the WR pulse (see Timing Diagrams). 6. CLK IN (pin 4) is the input of a Schmitt trigger circuit and is therefore specified separately.

AGAIN: clr p3.7 ;Chip select setb P2.5 ;RD=1 clr P2.6 ;WR=0 setb P2.6 ;WR=1- low to high transition WAIT: jb P2.7, WAIT ;wait for INTR clr p3.7 ;generate cs to ADC clr P2.5 ;RD=0 -High to low transition ;read digital o/p mov A, P1 mov P0,P1 sjmp AGAIN

Pin # 1 2 3 4 5 6 7 8 9 10

Description CS - Chip Select (Active Low) RD - Read (Active Low) WR - Write (Active Low) CLK IN - Clock IN INTR - Interrupt (Active Low) Vin+ - Analog Voltage Input Vin- - Analog Voltage Input AGND - Analog Ground Vref/2 - Voltage Reference / 2 DGND - Digital Ground

11 12 13 14 15 16 17 18 19 20

DB7 - Data Bit 7 (MSB) DB6 - Data Bit 6 DB5 - Data Bit 5 DB4 - Data Bit 4 DB3 - Data Bit 3 DB2 - Data Bit 2 DB1 - Data Bit 1 DB0 - Data Bit 0 (LSB) CLKR - Clock Reset Vcc - Positive Supply or Vref

This IC is basically a Motor driver. It consists of four inputs , four outputs , four grounds and two enables for each motors. We can drive two motors using single L293D chip.